forked from OSchip/llvm-project
75 lines
3.3 KiB
C++
75 lines
3.3 KiB
C++
//==- SystemZInstPrinter.h - Convert SystemZ MCInst to assembly --*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints a SystemZ MCInst to a .s file.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SYSTEMZ_INSTPRINTER_SYSTEMZINSTPRINTER_H
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#define LLVM_LIB_TARGET_SYSTEMZ_INSTPRINTER_SYSTEMZINSTPRINTER_H
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#include "llvm/MC/MCInstPrinter.h"
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namespace llvm {
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class MCOperand;
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class SystemZInstPrinter : public MCInstPrinter {
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public:
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SystemZInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
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const MCRegisterInfo &MRI)
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: MCInstPrinter(MAI, MII, MRI) {}
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// Automatically generated by tblgen.
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void printInstruction(const MCInst *MI, raw_ostream &O);
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static const char *getRegisterName(unsigned RegNo);
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// Print an address with the given base, displacement and index.
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static void printAddress(unsigned Base, int64_t Disp, unsigned Index,
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raw_ostream &O);
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// Print the given operand.
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static void printOperand(const MCOperand &MO, const MCAsmInfo *MAI,
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raw_ostream &O);
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// Override MCInstPrinter.
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void printRegName(raw_ostream &O, unsigned RegNo) const override;
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void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
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const MCSubtargetInfo &STI) override;
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private:
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// Print various types of operand.
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void printOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDVAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU1ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU2ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU3ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU4ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU6ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printS8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU12ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printS16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printS32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printPCRelOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printPCRelTLSOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printAccessRegOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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// Print the mnemonic for a condition-code mask ("ne", "lh", etc.)
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// This forms part of the instruction name rather than the operand list.
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void printCond4Operand(const MCInst *MI, int OpNum, raw_ostream &O);
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};
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} // end namespace llvm
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#endif
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