forked from OSchip/llvm-project
109 lines
3.6 KiB
C++
109 lines
3.6 KiB
C++
//===- Mem2Reg.cpp - The -mem2reg pass, a wrapper around the Utils lib ----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass is a simple pass wrapper around the PromoteMemToReg function call
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// exposed by the Utils library.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Transforms/Utils/Mem2Reg.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Analysis/AssumptionCache.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/Transforms/Scalar.h"
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#include "llvm/Transforms/Utils/PromoteMemToReg.h"
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#include "llvm/Transforms/Utils/UnifyFunctionExitNodes.h"
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using namespace llvm;
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#define DEBUG_TYPE "mem2reg"
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STATISTIC(NumPromoted, "Number of alloca's promoted");
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static bool promoteMemoryToRegister(Function &F, DominatorTree &DT,
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AssumptionCache &AC) {
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std::vector<AllocaInst *> Allocas;
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BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function
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bool Changed = false;
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while (1) {
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Allocas.clear();
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// Find allocas that are safe to promote, by looking at all instructions in
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// the entry node
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for (BasicBlock::iterator I = BB.begin(), E = --BB.end(); I != E; ++I)
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if (AllocaInst *AI = dyn_cast<AllocaInst>(I)) // Is it an alloca?
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if (isAllocaPromotable(AI))
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Allocas.push_back(AI);
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if (Allocas.empty())
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break;
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PromoteMemToReg(Allocas, DT, &AC);
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NumPromoted += Allocas.size();
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Changed = true;
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}
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return Changed;
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}
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PreservedAnalyses PromotePass::run(Function &F, FunctionAnalysisManager &AM) {
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auto &DT = AM.getResult<DominatorTreeAnalysis>(F);
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auto &AC = AM.getResult<AssumptionAnalysis>(F);
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if (!promoteMemoryToRegister(F, DT, AC))
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return PreservedAnalyses::all();
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PreservedAnalyses PA;
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PA.preserveSet<CFGAnalyses>();
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return PA;
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}
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namespace {
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struct PromoteLegacyPass : public FunctionPass {
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static char ID; // Pass identification, replacement for typeid
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PromoteLegacyPass() : FunctionPass(ID) {
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initializePromoteLegacyPassPass(*PassRegistry::getPassRegistry());
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}
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// runOnFunction - To run this pass, first we calculate the alloca
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// instructions that are safe for promotion, then we promote each one.
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//
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bool runOnFunction(Function &F) override {
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if (skipFunction(F))
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return false;
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DominatorTree &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
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AssumptionCache &AC =
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getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
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return promoteMemoryToRegister(F, DT, AC);
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.addRequired<AssumptionCacheTracker>();
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AU.addRequired<DominatorTreeWrapperPass>();
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AU.setPreservesCFG();
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}
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};
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} // end of anonymous namespace
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char PromoteLegacyPass::ID = 0;
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INITIALIZE_PASS_BEGIN(PromoteLegacyPass, "mem2reg", "Promote Memory to "
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"Register",
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false, false)
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INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker)
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INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
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INITIALIZE_PASS_END(PromoteLegacyPass, "mem2reg", "Promote Memory to Register",
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false, false)
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// createPromoteMemoryToRegister - Provide an entry point to create this pass.
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//
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FunctionPass *llvm::createPromoteMemoryToRegisterPass() {
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return new PromoteLegacyPass();
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}
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