forked from OSchip/llvm-project
30 lines
1.4 KiB
LLVM
30 lines
1.4 KiB
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv5 -disable-hsdr < %s | FileCheck %s
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; This one should generate a combine with two immediates.
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; CHECK: combine(#7,#7)
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@B = common global [400 x i32] zeroinitializer, align 8
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@A = common global [400 x i32] zeroinitializer, align 8
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@C = common global [400 x i32] zeroinitializer, align 8
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define void @run() nounwind {
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entry:
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br label %polly.loop_body
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polly.loop_after: ; preds = %polly.loop_body
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ret void
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polly.loop_body: ; preds = %entry, %polly.loop_body
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%polly.loopiv23 = phi i32 [ 0, %entry ], [ %polly.next_loopiv, %polly.loop_body ]
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%polly.next_loopiv = add nsw i32 %polly.loopiv23, 4
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%p_arrayidx1 = getelementptr [400 x i32], [400 x i32]* @A, i32 0, i32 %polly.loopiv23
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%p_arrayidx = getelementptr [400 x i32], [400 x i32]* @B, i32 0, i32 %polly.loopiv23
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%vector_ptr = bitcast i32* %p_arrayidx to <4 x i32>*
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%_p_vec_full = load <4 x i32>, <4 x i32>* %vector_ptr, align 8
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%mulp_vec = mul <4 x i32> %_p_vec_full, <i32 7, i32 7, i32 7, i32 7>
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%vector_ptr12 = bitcast i32* %p_arrayidx1 to <4 x i32>*
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%_p_vec_full13 = load <4 x i32>, <4 x i32>* %vector_ptr12, align 8
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%addp_vec = add <4 x i32> %_p_vec_full13, %mulp_vec
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store <4 x i32> %addp_vec, <4 x i32>* %vector_ptr12, align 8
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%0 = icmp slt i32 %polly.next_loopiv, 400
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br i1 %0, label %polly.loop_body, label %polly.loop_after
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}
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