forked from OSchip/llvm-project
38 lines
1.4 KiB
LLVM
38 lines
1.4 KiB
LLVM
; RUN: opt < %s -loop-vectorize -force-vector-width=4 -S | FileCheck %s
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; Test case for PR45525. Checks that phi's with a single predecessor and a mask are supported.
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define void @main(i1 %cond, i32* %arr) {
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; CHECK-LABEL: @main(
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; CHECK-NEXT: bb.0:
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; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK: [[TMP5:%.*]] = mul <4 x i32> [[VEC_IND]], <i32 3, i32 3, i32 3, i32 3>
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;
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bb.0:
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br label %bb.1
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bb.1: ; preds = %bb.3, %bb.0
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%iv = phi i32 [ 0, %bb.0 ], [ %iv.next, %bb.3 ]
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br i1 %cond, label %bb.3, label %bb.2
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bb.2: ; preds = %bb.1
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%single.pred = phi i32 [ %iv, %bb.1 ]
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%mult = mul i32 %single.pred, 3
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br label %bb.3
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bb.3: ; preds = %bb.2, %bb.1
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%stored.value = phi i32 [ 7, %bb.1 ], [ %mult, %bb.2 ]
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%arrayidx = getelementptr inbounds i32, i32* %arr, i32 %iv
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store i32 %stored.value, i32* %arrayidx
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%iv.next = add i32 %iv, 1
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%continue = icmp ult i32 %iv.next, 32
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br i1 %continue, label %bb.1, label %bb.4
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bb.4: ; preds = %bb.3
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ret void
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}
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