forked from OSchip/llvm-project
374 lines
12 KiB
LLVM
374 lines
12 KiB
LLVM
; RUN: opt -vector-library=LIBMVEC-X86 -inject-tli-mappings -loop-vectorize -S < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define void @sin_f64(double* nocapture %varray) {
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; CHECK-LABEL: @sin_f64(
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; CHECK-LABEL: vector.body
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; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP4:%.*]])
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;
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%tmp = trunc i64 %iv to i32
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%conv = sitofp i32 %tmp to double
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%call = tail call double @sin(double %conv)
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%arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
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store double %call, double* %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !1
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for.end:
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ret void
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}
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!1 = distinct !{!1, !2, !3}
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!2 = !{!"llvm.loop.vectorize.width", i32 2}
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!3 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @sin_f32(float* nocapture %varray) {
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; CHECK-LABEL: @sin_f32(
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; CHECK-LABEL: vector.body
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; CHECK: [[TMP5:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP4:%.*]])
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;
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%tmp = trunc i64 %iv to i32
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%conv = sitofp i32 %tmp to float
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%call = tail call float @sinf(float %conv)
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%arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
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store float %call, float* %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !21
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for.end:
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ret void
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}
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!21 = distinct !{!21, !22, !23}
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!22 = !{!"llvm.loop.vectorize.width", i32 8}
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!23 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @sin_f64_intrinsic(double* nocapture %varray) {
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; CHECK-LABEL: @sin_f64_intrinsic(
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; CHECK-LABEL: vector.body
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; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP4:%.*]])
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;
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%tmp = trunc i64 %iv to i32
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%conv = sitofp i32 %tmp to double
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%call = tail call double @llvm.sin.f64(double %conv)
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%arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
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store double %call, double* %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !31
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for.end:
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ret void
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}
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!31 = distinct !{!31, !32, !33}
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!32 = !{!"llvm.loop.vectorize.width", i32 2}
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!33 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @sin_f32_intrinsic(float* nocapture %varray) {
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; CHECK-LABEL: @sin_f32_intrinsic(
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; CHECK-LABEL: vector.body
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; CHECK: [[TMP5:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP4:%.*]])
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;
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%tmp = trunc i64 %iv to i32
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%conv = sitofp i32 %tmp to float
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%call = tail call float @llvm.sin.f32(float %conv)
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%arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
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store float %call, float* %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !41
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for.end:
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ret void
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}
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!41 = distinct !{!41, !42, !43}
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!42 = !{!"llvm.loop.vectorize.width", i32 8}
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!43 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @cos_f64(double* nocapture %varray) {
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; CHECK-LABEL: @cos_f64(
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; CHECK-LABEL: vector.body
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; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP4:%.*]])
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;
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%tmp = trunc i64 %iv to i32
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%conv = sitofp i32 %tmp to double
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%call = tail call double @cos(double %conv)
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%arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
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store double %call, double* %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !51
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for.end:
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ret void
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}
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!51 = distinct !{!51, !52, !53}
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!52 = !{!"llvm.loop.vectorize.width", i32 2}
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!53 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @cos_f32(float* nocapture %varray) {
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; CHECK-LABEL: @cos_f32(
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; CHECK-LABEL: vector.body
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; CHECK: [[TMP5:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP4:%.*]])
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;
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%tmp = trunc i64 %iv to i32
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%conv = sitofp i32 %tmp to float
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%call = tail call float @cosf(float %conv)
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%arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
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store float %call, float* %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !61
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for.end:
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ret void
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}
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!61 = distinct !{!61, !62, !63}
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!62 = !{!"llvm.loop.vectorize.width", i32 8}
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!63 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @cos_f64_intrinsic(double* nocapture %varray) {
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; CHECK-LABEL: @cos_f64_intrinsic(
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; CHECK-LABEL: vector.body
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; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP4:%.*]])
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;
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%tmp = trunc i64 %iv to i32
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%conv = sitofp i32 %tmp to double
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%call = tail call double @llvm.cos.f64(double %conv)
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%arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
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store double %call, double* %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !71
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for.end:
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ret void
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}
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!71 = distinct !{!71, !72, !73}
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!72 = !{!"llvm.loop.vectorize.width", i32 2}
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!73 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @cos_f32_intrinsic(float* nocapture %varray) {
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; CHECK-LABEL: @cos_f32_intrinsic(
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; CHECK-LABEL: vector.body
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; CHECK: [[TMP5:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP4:%.*]])
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;
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%tmp = trunc i64 %iv to i32
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%conv = sitofp i32 %tmp to float
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%call = tail call float @llvm.cos.f32(float %conv)
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%arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
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store float %call, float* %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !81
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for.end:
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ret void
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}
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!81 = distinct !{!81, !82, !83}
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!82 = !{!"llvm.loop.vectorize.width", i32 8}
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!83 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @exp_f32(float* nocapture %varray) {
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; CHECK-LABEL: @exp_f32
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; CHECK-LABEL: vector.body
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; CHECK: <8 x float> @_ZGVdN8v_expf
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%tmp = trunc i64 %indvars.iv to i32
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%conv = sitofp i32 %tmp to float
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%call = tail call fast float @expf(float %conv)
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%arrayidx = getelementptr inbounds float, float* %varray, i64 %indvars.iv
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store float %call, float* %arrayidx, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !91
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for.end: ; preds = %for.body
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ret void
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}
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!91 = distinct !{!91, !92, !93}
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!92 = !{!"llvm.loop.vectorize.width", i32 8}
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!93 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @exp_f32_intrin(float* nocapture %varray) {
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; CHECK-LABEL: @exp_f32_intrin
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; CHECK-LABEL: vector.body
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; CHECK: <8 x float> @_ZGVdN8v_expf
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%tmp = trunc i64 %indvars.iv to i32
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%conv = sitofp i32 %tmp to float
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%call = tail call fast float @llvm.exp.f32(float %conv)
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%arrayidx = getelementptr inbounds float, float* %varray, i64 %indvars.iv
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store float %call, float* %arrayidx, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !101
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for.end: ; preds = %for.body
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ret void
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}
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!101 = distinct !{!101, !102, !103}
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!102 = !{!"llvm.loop.vectorize.width", i32 8}
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!103 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @log_f32(float* nocapture %varray) {
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; CHECK-LABEL: @log_f32
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; CHECK-LABEL: vector.body
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; CHECK: <8 x float> @_ZGVdN8v_logf
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%tmp = trunc i64 %indvars.iv to i32
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%conv = sitofp i32 %tmp to float
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%call = tail call fast float @logf(float %conv)
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%arrayidx = getelementptr inbounds float, float* %varray, i64 %indvars.iv
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store float %call, float* %arrayidx, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !111
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for.end: ; preds = %for.body
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ret void
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}
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!111 = distinct !{!111, !112, !113}
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!112 = !{!"llvm.loop.vectorize.width", i32 8}
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!113 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @pow_f32(float* nocapture %varray, float* nocapture readonly %exp) {
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; CHECK-LABEL: @pow_f32
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; CHECK-LABEL: vector.body
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; CHECK: <8 x float> @_ZGVdN8vv_powf
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%tmp = trunc i64 %indvars.iv to i32
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%conv = sitofp i32 %tmp to float
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%arrayidx = getelementptr inbounds float, float* %exp, i64 %indvars.iv
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%tmp1 = load float, float* %arrayidx, align 4
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%tmp2 = tail call fast float @powf(float %conv, float %tmp1)
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%arrayidx2 = getelementptr inbounds float, float* %varray, i64 %indvars.iv
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store float %tmp2, float* %arrayidx2, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !121
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for.end: ; preds = %for.body
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ret void
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}
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!121 = distinct !{!121, !122, !123}
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!122 = !{!"llvm.loop.vectorize.width", i32 8}
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!123 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @pow_f32_intrin(float* nocapture %varray, float* nocapture readonly %exp) {
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; CHECK-LABEL: @pow_f32_intrin
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; CHECK-LABEL: vector.body
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; CHECK: <8 x float> @_ZGVdN8vv_powf
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%tmp = trunc i64 %indvars.iv to i32
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%conv = sitofp i32 %tmp to float
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%arrayidx = getelementptr inbounds float, float* %exp, i64 %indvars.iv
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%tmp1 = load float, float* %arrayidx, align 4
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%tmp2 = tail call fast float @llvm.pow.f32(float %conv, float %tmp1)
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%arrayidx2 = getelementptr inbounds float, float* %varray, i64 %indvars.iv
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store float %tmp2, float* %arrayidx2, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !131
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for.end: ; preds = %for.body
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ret void
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}
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!131 = distinct !{!131, !132, !133}
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!132 = !{!"llvm.loop.vectorize.width", i32 8}
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!133 = !{!"llvm.loop.vectorize.enable", i1 true}
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attributes #0 = { nounwind readnone }
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declare double @sin(double) #0
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declare float @sinf(float) #0
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declare double @llvm.sin.f64(double) #0
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declare float @llvm.sin.f32(float) #0
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declare double @cos(double) #0
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declare float @cosf(float) #0
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declare double @llvm.cos.f64(double) #0
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declare float @llvm.cos.f32(float) #0
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declare float @expf(float) #0
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declare float @powf(float, float) #0
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declare float @llvm.exp.f32(float) #0
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declare float @logf(float) #0
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declare float @llvm.pow.f32(float, float) #0
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