llvm-project/llvm/test/CodeGen
Shawn Landden de9f842c55 [PowerPC] add popcount CodeGen test; NFC 2020-06-25 12:41:33 +04:00
..
AArch64 [x86][AArch64] add tests for fmul-fma combine; NFC 2020-06-24 15:56:32 -04:00
AMDGPU [AMDGPU] Select s_cselect 2020-06-25 10:38:23 +02:00
ARC
ARM [ARM][BFloat] Legalize bf16 type even without fullfp16. 2020-06-24 09:36:26 +01:00
AVR [AVR] Rewrite the function calling convention. 2020-06-23 21:36:18 +12:00
BPF [BPF] fix a bug for BTF pointee type pruning 2020-06-17 15:13:46 -07:00
Generic [LLParser] Delete temp CallInst when error occurs 2020-06-16 11:41:25 +08:00
Hexagon [Hexagon] Reducing minimum alignment requirement 2020-06-24 10:28:37 -05:00
Inputs
Lanai
MIR [MIR] Fix CFI_INSTRUCTION escape printing 2020-06-24 18:15:28 -04:00
MSP430 Revert "[MSP430] Update register names" 2020-06-22 13:37:22 +03:00
Mips [DAGCombine] Generalize the case (add (or x, c1), c2) -> (add x, (c1 + c2)) 2020-06-12 13:53:08 -04:00
NVPTX [NVPTX] Fix for NVPTX module asm regression 2020-06-24 11:17:09 -07:00
PowerPC [PowerPC] add popcount CodeGen test; NFC 2020-06-25 12:41:33 +04:00
RISCV [RISCV][NFC] Add tests for folds of ADDIs into load/stores 2020-06-23 22:59:54 +01:00
SPARC [SPARC] Lower fp16 ops to libcalls 2020-06-10 19:15:26 -07:00
SystemZ [SystemZ] Bugfix in storeLoadCanUseBlockBinary(). 2020-06-17 09:49:31 +02:00
Thumb
Thumb2 [ARM] Mark more integer instructions as not having side effects. 2020-06-23 22:45:51 +01:00
VE [VE] Support relocation information in MC layer 2020-06-15 11:24:53 +02:00
WebAssembly [Target] As part of using inclusive language within the llvm project, 2020-06-20 00:06:39 -07:00
WinCFGuard
WinEH
X86 [X86] Emit a reg-reg copy for fast isel of vector bitcasts. 2020-06-24 20:15:21 -07:00
XCore