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AsmParser
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Disassembler
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MCTargetDesc
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[VE] Add include for formatted_raw_ostream after 046cfb8565
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2021-01-29 11:18:30 -08:00 |
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TargetInfo
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CMakeLists.txt
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LVLGen.cpp
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[VE] Correct LVLGen (LVL instruction insert pass)
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2020-12-09 06:33:53 +09:00 |
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VE.h
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[VE] Change inetger constants 32-bit friendly
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2021-02-01 19:00:47 +09:00 |
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VE.td
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[VE] Change default CPU name to "generic"
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2021-01-04 20:09:57 +09:00 |
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VEAsmPrinter.cpp
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[VE][NFC] Update comments to match the generated instructions
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2021-01-07 15:13:24 +09:00 |
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VECallingConv.td
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[VE] Correct VMP allocation in calling conv
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2020-12-21 22:42:24 +09:00 |
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VEFrameLowering.cpp
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[NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions
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2021-03-30 17:31:39 +01:00 |
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VEFrameLowering.h
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VEISelDAGToDAG.cpp
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[llvm] Use isa instead of dyn_cast (NFC)
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2021-01-29 23:23:37 -08:00 |
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VEISelLowering.cpp
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[VE][NFC] IRBuilder<> -> IRBuilderBase
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2021-06-08 13:55:49 +02:00 |
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VEISelLowering.h
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[VE][NFC] IRBuilder<> -> IRBuilderBase
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2021-06-08 13:55:49 +02:00 |
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VEInstrBuilder.h
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[VE] Support SJLJ exception related instructions
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2021-01-05 20:19:15 +09:00 |
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VEInstrFormats.td
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VEInstrInfo.cpp
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[VE] Support copy of vector mask registers
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2020-12-19 09:16:43 +09:00 |
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VEInstrInfo.h
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VEInstrInfo.td
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[VE] Fix types of multiclass template arguments in TableGen files
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2021-03-20 10:36:51 -07:00 |
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VEInstrIntrinsicVL.gen.td
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[VE] Add logical mask intrinsic instructions
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2020-12-15 01:34:31 +09:00 |
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VEInstrIntrinsicVL.td
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[VE] Support additional VMRGW and VMV intrinsic instructions
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2021-01-11 20:50:31 +09:00 |
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VEInstrPatternsVec.td
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[VE] Fix types of multiclass template arguments in TableGen files
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2021-03-20 10:36:51 -07:00 |
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VEInstrVec.td
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[VE] Add logical mask intrinsic instructions
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2020-12-15 01:34:31 +09:00 |
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VEMCInstLower.cpp
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VEMachineFunctionInfo.cpp
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VEMachineFunctionInfo.h
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VERegisterInfo.cpp
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[VE] Support atomic exchange instructions
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2020-12-15 17:43:11 +09:00 |
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VERegisterInfo.h
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VERegisterInfo.td
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VESubtarget.cpp
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[VE] Change default CPU name to "generic"
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2021-01-04 20:09:57 +09:00 |
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VESubtarget.h
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VETargetMachine.cpp
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[llvm] Use Optional::getValueOr (NFC)
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2021-01-12 21:43:50 -08:00 |
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VETargetMachine.h
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VETargetTransformInfo.h
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[VE] VP intrinsics are legal
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2021-04-30 15:47:55 +02:00 |
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VVPInstrInfo.td
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[VE] Vector 'and' isel and tests
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2020-12-23 13:29:29 +01:00 |
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VVPInstrPatternsVec.td
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[VE] Vector 'and' isel and tests
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2020-12-23 13:29:29 +01:00 |
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VVPNodes.def
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[VP] ISD helper functions [VE] isel for vp_add, vp_and
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2021-01-08 14:29:45 +01:00 |
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