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AArch64
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[DAG] Fold i1/vXi1 saddsat/uaddsat(x,y) -> or(x,y)
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2021-02-13 15:02:01 +00:00 |
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AMDGPU
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ELFObjectWriter: Don't sort non-local symbols
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2021-02-13 10:32:27 -08:00 |
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ARC
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…
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ARM
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[DAG] PromoteIntRes_ADDSUBSHLSAT - use promoted ISD::USUBSAT directly
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2021-02-13 12:35:10 +00:00 |
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AVR
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[AVR] Fix a bug in 16-bit shifts
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2021-02-14 11:54:55 +08:00 |
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BPF
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…
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Generic
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[CodeGen] New pass: Replace vector intrinsics with call to vector library
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2021-02-12 12:53:27 -05:00 |
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Hexagon
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[NewPM][opt] Run the "default" AA pipeline by default
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2021-01-21 21:08:54 -08:00 |
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Inputs
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…
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Lanai
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…
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MIR
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[AMDGPU] Implement mir parseCustomPseudoSourceValue
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2021-01-22 11:24:08 +01:00 |
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MSP430
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…
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Mips
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[DAGCombiner] Remove (sra (shl X, C), C) if X has more than C sign bits.
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2021-02-03 10:18:40 -08:00 |
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NVPTX
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[NVPTX][NewPM] Re-enable NVVMReflectPass
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2021-02-08 13:58:17 -08:00 |
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PowerPC
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[test] Make ELF tests less reliant on the lexicographical order of non-local symbols
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2021-02-13 01:01:06 -08:00 |
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RISCV
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[RISCV] Add support for fixed vector fabs
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2021-02-12 15:33:36 -08:00 |
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SPARC
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[SPARC] Fix fp128 load/stores
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2021-01-13 14:59:50 -08:00 |
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SystemZ
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[SystemZ] misched-cutoff tests can only be tested on non-NDEBUG (assertion) builds
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2021-01-14 15:46:27 +00:00 |
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Thumb
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[RISCV][PrologEpilogInserter] "Float" emergency spill slots to avoid making them immediately unreachable from the stack pointer
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2021-01-23 09:10:03 +00:00 |
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Thumb2
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[ARM] Add some tests for MVE lane interleaving. NFC
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2021-02-14 16:51:18 +00:00 |
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VE
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[VE] Update VELIntrinsic tests
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2021-01-13 00:12:50 +09:00 |
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WebAssembly
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[WebAssemblly] Fix rethrow's argument computation
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2021-02-13 03:43:15 -08:00 |
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WinCFGuard
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…
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WinEH
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X86
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[DAG] Fold i1/vXi1 saddsat/uaddsat(x,y) -> or(x,y)
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2021-02-13 15:02:01 +00:00 |
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XCore
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…
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