forked from OSchip/llvm-project
c7a0b2684f
This patch implements initial backend support for a -mtune CPU controlled by a "tune-cpu" function attribute. If the attribute is not present X86 will use the resolved CPU from target-cpu attribute or command line. This patch adds MC layer support a tune CPU. Each CPU now has two sets of features stored in their GenSubtargetInfo.inc tables . These features lists are passed separately to the Processor and ProcessorModel classes in tablegen. The tune list defaults to an empty list to avoid changes to non-X86. This annoyingly increases the size of static tables on all target as we now store 24 more bytes per CPU. I haven't quantified the overall impact, but I can if we're concerned. One new test is added to X86 to show a few tuning features with mismatched tune-cpu and target-cpu/target-feature attributes to demonstrate independent control. Another new test is added to demonstrate that the scheduler model follows the tune CPU. I have not added a -mtune to llc/opt or MC layer command line yet. With no attributes we'll just use the -mcpu for both. MC layer tools will always follow the normal CPU for tuning. Differential Revision: https://reviews.llvm.org/D85165 |
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| .. | ||
| CMakeLists.txt | ||
| LLVMBuild.txt | ||
| MipsABIFlagsSection.cpp | ||
| MipsABIFlagsSection.h | ||
| MipsABIInfo.cpp | ||
| MipsABIInfo.h | ||
| MipsAsmBackend.cpp | ||
| MipsAsmBackend.h | ||
| MipsBaseInfo.h | ||
| MipsELFObjectWriter.cpp | ||
| MipsELFStreamer.cpp | ||
| MipsELFStreamer.h | ||
| MipsFixupKinds.h | ||
| MipsInstPrinter.cpp | ||
| MipsInstPrinter.h | ||
| MipsMCAsmInfo.cpp | ||
| MipsMCAsmInfo.h | ||
| MipsMCCodeEmitter.cpp | ||
| MipsMCCodeEmitter.h | ||
| MipsMCExpr.cpp | ||
| MipsMCExpr.h | ||
| MipsMCNaCl.h | ||
| MipsMCTargetDesc.cpp | ||
| MipsMCTargetDesc.h | ||
| MipsNaClELFStreamer.cpp | ||
| MipsOptionRecord.cpp | ||
| MipsTargetStreamer.cpp | ||