forked from OSchip/llvm-project
f6302441f0
bool %test(int %X) { %Y = and int %X, 8 %Z = setne int %Y, 0 ret bool %Z } we now generate this: rlwinm r2, r3, 0, 28, 28 srwi r3, r2, 3 instead of this: rlwinm r2, r3, 0, 28, 28 srwi r2, r2, 3 rlwinm r3, r2, 0, 31, 31 I'll leave it to Nate to get it down to one instruction. :) --------------------------------------------------------------------- llvm-svn: 21391 |
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.. | ||
LegalizeDAG.cpp | ||
Makefile | ||
SelectionDAG.cpp | ||
SelectionDAGISel.cpp | ||
SelectionDAGPrinter.cpp |