forked from OSchip/llvm-project
248 lines
8.7 KiB
C++
248 lines
8.7 KiB
C++
//===-- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ---*- C++ -*--===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains support for writing dwarf compile unit.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
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#define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
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#include "llvm/IR/DebugInfo.h"
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#include "llvm/Support/DataTypes.h"
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namespace llvm {
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class AsmPrinter;
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class ByteStreamer;
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class TargetRegisterInfo;
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class DwarfUnit;
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class DIELoc;
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/// Holds a DIExpression and keeps track of how many operands have been consumed
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/// so far.
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class DIExpressionCursor {
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DIExpression::expr_op_iterator Start, End;
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public:
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DIExpressionCursor(const DIExpression *Expr) {
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if (!Expr) {
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assert(Start == End);
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return;
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}
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Start = Expr->expr_op_begin();
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End = Expr->expr_op_end();
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}
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DIExpressionCursor(ArrayRef<uint64_t> Expr)
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: Start(Expr.begin()), End(Expr.end()) {}
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/// Consume one operation.
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Optional<DIExpression::ExprOperand> take() {
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if (Start == End)
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return None;
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return *(Start++);
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}
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/// Consume N operations.
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void consume(unsigned N) { std::advance(Start, N); }
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/// Return the current operation.
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Optional<DIExpression::ExprOperand> peek() const {
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if (Start == End)
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return None;
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return *(Start);
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}
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/// Return the next operation.
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Optional<DIExpression::ExprOperand> peekNext() const {
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if (Start == End)
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return None;
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auto Next = Start.getNext();
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if (Next == End)
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return None;
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return *Next;
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}
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/// Determine whether there are any operations left in this expression.
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operator bool() const { return Start != End; }
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/// Retrieve the fragment information, if any.
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Optional<DIExpression::FragmentInfo> getFragmentInfo() const {
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return DIExpression::getFragmentInfo(Start, End);
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}
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};
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/// Base class containing the logic for constructing DWARF expressions
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/// independently of whether they are emitted into a DIE or into a .debug_loc
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/// entry.
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class DwarfExpression {
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protected:
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/// Holds information about all subregisters comprising a register location.
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struct Register {
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int DwarfRegNo;
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unsigned Size;
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const char *Comment;
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};
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/// The register location, if any.
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SmallVector<Register, 2> DwarfRegs;
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/// Current Fragment Offset in Bits.
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uint64_t OffsetInBits = 0;
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unsigned DwarfVersion;
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/// Sometimes we need to add a DW_OP_bit_piece to describe a subregister.
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unsigned SubRegisterSizeInBits = 0;
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unsigned SubRegisterOffsetInBits = 0;
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/// Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed
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/// to represent a subregister.
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void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits) {
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SubRegisterSizeInBits = SizeInBits;
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SubRegisterOffsetInBits = OffsetInBits;
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}
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/// Add masking operations to stencil out a subregister.
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void maskSubRegister();
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/// Output a dwarf operand and an optional assembler comment.
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virtual void emitOp(uint8_t Op, const char *Comment = nullptr) = 0;
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/// Emit a raw signed value.
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virtual void emitSigned(int64_t Value) = 0;
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/// Emit a raw unsigned value.
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virtual void emitUnsigned(uint64_t Value) = 0;
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/// Return whether the given machine register is the frame register in the
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/// current function.
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virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0;
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/// Emit a DW_OP_reg operation.
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void addReg(int DwarfReg, const char *Comment = nullptr);
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/// Emit a DW_OP_breg operation.
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void addBReg(int DwarfReg, int Offset);
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/// Emit DW_OP_fbreg <Offset>.
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void addFBReg(int Offset);
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/// Emit a partial DWARF register operation.
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///
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/// \param MachineReg The register number.
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/// \param MaxSize If the register must be composed from
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/// sub-registers this is an upper bound
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/// for how many bits the emitted DW_OP_piece
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/// may cover.
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///
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/// If size and offset is zero an operation for the entire register is
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/// emitted: Some targets do not provide a DWARF register number for every
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/// register. If this is the case, this function will attempt to emit a DWARF
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/// register by emitting a fragment of a super-register or by piecing together
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/// multiple subregisters that alias the register.
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///
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/// \return false if no DWARF register exists for MachineReg.
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bool addMachineReg(const TargetRegisterInfo &TRI, unsigned MachineReg,
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unsigned MaxSize = ~1U);
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/// Emit a DW_OP_piece or DW_OP_bit_piece operation for a variable fragment.
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/// \param OffsetInBits This is an optional offset into the location that
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/// is at the top of the DWARF stack.
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void addOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
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/// Emit a shift-right dwarf operation.
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void addShr(unsigned ShiftBy);
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/// Emit a bitwise and dwarf operation.
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void addAnd(unsigned Mask);
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/// Emit a DW_OP_stack_value, if supported.
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///
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/// The proper way to describe a constant value is DW_OP_constu <const>,
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/// DW_OP_stack_value. Unfortunately, DW_OP_stack_value was not available
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/// until DWARF 4, so we will continue to generate DW_OP_constu <const> for
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/// DWARF 2 and DWARF 3. Technically, this is incorrect since DW_OP_const
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/// <const> actually describes a value at a constant addess, not a constant
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/// value. However, in the past there was no better way to describe a
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/// constant value, so the producers and consumers started to rely on
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/// heuristics to disambiguate the value vs. location status of the
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/// expression. See PR21176 for more details.
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void addStackValue();
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~DwarfExpression() = default;
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public:
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DwarfExpression(unsigned DwarfVersion) : DwarfVersion(DwarfVersion) {}
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/// This needs to be called last to commit any pending changes.
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void finalize();
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/// Emit a signed constant.
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void addSignedConstant(int64_t Value);
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/// Emit an unsigned constant.
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void addUnsignedConstant(uint64_t Value);
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/// Emit an unsigned constant.
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void addUnsignedConstant(const APInt &Value);
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/// Emit a machine register location. As an optimization this may also consume
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/// the prefix of a DwarfExpression if a more efficient representation for
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/// combining the register location and the first operation exists.
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///
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/// \param FragmentOffsetInBits If this is one fragment out of a fragmented
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/// location, this is the offset of the
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/// fragment inside the entire variable.
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/// \return false if no DWARF register exists
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/// for MachineReg.
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bool addMachineRegExpression(const TargetRegisterInfo &TRI,
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DIExpressionCursor &Expr, unsigned MachineReg,
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unsigned FragmentOffsetInBits = 0);
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/// Emit all remaining operations in the DIExpressionCursor.
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///
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/// \param FragmentOffsetInBits If this is one fragment out of multiple
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/// locations, this is the offset of the
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/// fragment inside the entire variable.
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void addExpression(DIExpressionCursor &&Expr,
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unsigned FragmentOffsetInBits = 0);
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/// If applicable, emit an empty DW_OP_piece / DW_OP_bit_piece to advance to
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/// the fragment described by \c Expr.
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void addFragmentOffset(const DIExpression *Expr);
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};
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/// DwarfExpression implementation for .debug_loc entries.
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class DebugLocDwarfExpression final : public DwarfExpression {
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ByteStreamer &BS;
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void emitOp(uint8_t Op, const char *Comment = nullptr) override;
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void emitSigned(int64_t Value) override;
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void emitUnsigned(uint64_t Value) override;
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bool isFrameRegister(const TargetRegisterInfo &TRI,
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unsigned MachineReg) override;
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public:
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DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS)
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: DwarfExpression(DwarfVersion), BS(BS) {}
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};
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/// DwarfExpression implementation for singular DW_AT_location.
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class DIEDwarfExpression final : public DwarfExpression {
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const AsmPrinter &AP;
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DwarfUnit &DU;
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DIELoc &DIE;
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void emitOp(uint8_t Op, const char *Comment = nullptr) override;
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void emitSigned(int64_t Value) override;
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void emitUnsigned(uint64_t Value) override;
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bool isFrameRegister(const TargetRegisterInfo &TRI,
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unsigned MachineReg) override;
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public:
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DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIELoc &DIE);
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DIELoc *finalize() {
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DwarfExpression::finalize();
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return &DIE;
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}
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};
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}
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#endif
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