llvm-project/lld/ELF/Arch
Adhemerval Zanella 988cc0a083 [LLD][ELF][AArch64] Add support for R_AARCH64_LD64_GOTPAGE_LO15 relocation
It is not used by LLVM, but GCC might generates it when compiling
with -fpie, as indicated by PR#40357 [1].

[1] https://bugs.llvm.org/show_bug.cgi?id=40357
2021-01-26 12:01:38 +00:00
..
AArch64.cpp [LLD][ELF][AArch64] Add support for R_AARCH64_LD64_GOTPAGE_LO15 relocation 2021-01-26 12:01:38 +00:00
AMDGPU.cpp [lib/Object] - Refine interface of ELFFile<ELFT>. NFCI. 2020-09-15 11:38:31 +03:00
ARM.cpp [ELF] Rename R_TLS to R_TPREL and R_NEG_TLS to R_TPREL_NEG. NFC 2020-12-18 08:24:42 -08:00
AVR.cpp [LLD][ELF][AVR] Implement the missing relocation types 2020-07-12 18:18:54 +02:00
Hexagon.cpp [ELF] Rename R_TLS to R_TPREL and R_NEG_TLS to R_TPREL_NEG. NFC 2020-12-18 08:24:42 -08:00
MSP430.cpp [ELF] Use namespace qualifiers (lld:: or elf::) instead of `namespace lld { namespace elf {` 2020-05-15 08:49:53 -07:00
Mips.cpp [ELF] Rename R_TLS to R_TPREL and R_NEG_TLS to R_TPREL_NEG. NFC 2020-12-18 08:24:42 -08:00
MipsArchTree.cpp [lib/Object] - Refine interface of ELFFile<ELFT>. NFCI. 2020-09-15 11:38:31 +03:00
PPC.cpp [ELF] Support R_PPC_ADDR24 (ba foo; bla foo) 2021-01-17 00:02:13 -08:00
PPC64.cpp [ELF] Support R_PPC64_ADDR16_HIGH 2021-01-19 11:42:53 -08:00
PPCInsns.def [LLD][PowerPC] Implement GOT to PC-Rel relaxation 2020-08-17 09:36:09 -05:00
RISCV.cpp [ELF] Rename R_TLS to R_TPREL and R_NEG_TLS to R_TPREL_NEG. NFC 2020-12-18 08:24:42 -08:00
SPARCV9.cpp [ELF] Rename R_TLS to R_TPREL and R_NEG_TLS to R_TPREL_NEG. NFC 2020-12-18 08:24:42 -08:00
X86.cpp [ELF] Rename R_TLS to R_TPREL and R_NEG_TLS to R_TPREL_NEG. NFC 2020-12-18 08:24:42 -08:00
X86_64.cpp [ELF] Rename R_TLS to R_TPREL and R_NEG_TLS to R_TPREL_NEG. NFC 2020-12-18 08:24:42 -08:00