forked from OSchip/llvm-project
493fb266ed
In rL294814, we allow formula with SCEVAddRecExpr type of Reg from loops
other than current loop. This is good for the case when induction variable
of outerloop being used in expr in innerloop. But it is very bad to allow
such Reg from sibling loop because we may need to add lsr.iv in other sibling
loops when scev expanding those SCEVAddRecExpr type exprs. For the testcase
below, one loop can be inserted with a bunch of lsr.iv because of LSR for
other loops.
// The induction variable j from a loop in the middle will have initial
// value generated from previous sibling loop and exit value used by its
// next sibling loop.
void goo(long i, long j);
long cond;
void foo(long N) {
long i = 0;
long j = 0;
i = 0; do { goo(i, j); i++; j++; } while (cond);
i = 0; do { goo(i, j); i++; j++; } while (cond);
i = 0; do { goo(i, j); i++; j++; } while (cond);
i = 0; do { goo(i, j); i++; j++; } while (cond);
i = 0; do { goo(i, j); i++; j++; } while (cond);
i = 0; do { goo(i, j); i++; j++; } while (cond);
}
The fix is to only allow formula with SCEVAddRecExpr type of Reg from current
loop or its parents.
Differential Revision: https://reviews.llvm.org/D30021
llvm-svn: 295378
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|---|---|---|
| .. | ||
| 2008-08-14-ShadowIV.ll | ||
| 2009-11-10-LSRCrash.ll | ||
| 2011-07-20-DoubleIV.ll | ||
| 2011-11-29-postincphi.ll | ||
| 2011-12-04-loserreg.ll | ||
| 2012-01-13-phielim.ll | ||
| incorrect-offset-scaling.ll | ||
| ivchain-X86.ll | ||
| ivchain-stress-X86.ll | ||
| lit.local.cfg | ||
| lsr-insns-1.ll | ||
| lsr-insns-2.ll | ||
| nested-loop.ll | ||
| no_superflous_induction_vars.ll | ||
| pr17473.ll | ||
| pr28719.ll | ||
| sibling-loops.ll | ||