forked from OSchip/llvm-project
112 lines
2.9 KiB
LLVM
112 lines
2.9 KiB
LLVM
; Test 64-bit floating-point loads.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; Test the low end of the LD range.
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define double @f1(double *%src) {
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; CHECK-LABEL: f1:
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; CHECK: ld %f0, 0(%r2)
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; CHECK: br %r14
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%val = load double, double *%src
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ret double %val
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}
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; Test the high end of the LD range.
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define double @f2(double *%src) {
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; CHECK-LABEL: f2:
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; CHECK: ld %f0, 4088(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, double *%src, i64 511
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%val = load double, double *%ptr
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ret double %val
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}
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; Check the next doubleword up, which should use LDY instead of LD.
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define double @f3(double *%src) {
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; CHECK-LABEL: f3:
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; CHECK: ldy %f0, 4096(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, double *%src, i64 512
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%val = load double, double *%ptr
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ret double %val
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}
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; Check the high end of the aligned LDY range.
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define double @f4(double *%src) {
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; CHECK-LABEL: f4:
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; CHECK: ldy %f0, 524280(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, double *%src, i64 65535
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%val = load double, double *%ptr
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ret double %val
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}
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; Check the next doubleword up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define double @f5(double *%src) {
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; CHECK-LABEL: f5:
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; CHECK: agfi %r2, 524288
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; CHECK: ld %f0, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, double *%src, i64 65536
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%val = load double, double *%ptr
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ret double %val
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}
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; Check the high end of the negative aligned LDY range.
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define double @f6(double *%src) {
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; CHECK-LABEL: f6:
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; CHECK: ldy %f0, -8(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, double *%src, i64 -1
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%val = load double, double *%ptr
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ret double %val
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}
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; Check the low end of the LDY range.
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define double @f7(double *%src) {
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; CHECK-LABEL: f7:
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; CHECK: ldy %f0, -524288(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, double *%src, i64 -65536
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%val = load double, double *%ptr
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ret double %val
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}
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; Check the next doubleword down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define double @f8(double *%src) {
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; CHECK-LABEL: f8:
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; CHECK: agfi %r2, -524296
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; CHECK: ld %f0, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double, double *%src, i64 -65537
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%val = load double, double *%ptr
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ret double %val
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}
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; Check that LD allows an index.
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define double @f9(i64 %src, i64 %index) {
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; CHECK-LABEL: f9:
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; CHECK: ld %f0, 4095({{%r3,%r2|%r2,%r3}})
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; CHECK: br %r14
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%add1 = add i64 %src, %index
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%add2 = add i64 %add1, 4095
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%ptr = inttoptr i64 %add2 to double *
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%val = load double, double *%ptr
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ret double %val
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}
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; Check that LDY allows an index.
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define double @f10(i64 %src, i64 %index) {
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; CHECK-LABEL: f10:
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; CHECK: ldy %f0, 4096({{%r3,%r2|%r2,%r3}})
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; CHECK: br %r14
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%add1 = add i64 %src, %index
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%add2 = add i64 %add1, 4096
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%ptr = inttoptr i64 %add2 to double *
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%val = load double, double *%ptr
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ret double %val
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}
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