llvm-project/llvm/test/CodeGen
Sam Parker b3438f1cc0 [ARM][CGP] Allow signext arguments
As we perform a zext on any arguments used in the promoted tree, it
doesn't matter if they're marked as signext. The only permitted
user(s) in the tree which would interpret the sign bits are signed
icmps. For these instructions, their promoted operands are truncated
before the icmp uses them.

Differential Revision: https://reviews.llvm.org/D68019

llvm-svn: 373186
2019-09-30 07:52:10 +00:00
..
AArch64 [GlobalISel Enable memcpy inlining with optsize. 2019-09-28 07:55:42 +00:00
AMDGPU AMDGPU/GlobalISel: Fix select for v2s16 and/or/xor 2019-09-30 06:31:30 +00:00
ARC
ARM [ARM][CGP] Allow signext arguments 2019-09-30 07:52:10 +00:00
AVR
BPF [BPF] Generate array dimension size properly for zero-size elements 2019-09-24 22:38:43 +00:00
Generic Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."" 2019-09-10 10:39:09 +00:00
Hexagon [Hexagon] Bitcast v4i16 to v8i8, unify no-op casts between scalar and HVX 2019-09-23 14:33:27 +00:00
Inputs
Lanai [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
MIR Add a missing space in a MIR parser error message 2019-09-20 14:41:41 +00:00
MSP430 [MSP430] Allow msp430_intrcc functions to not have interrupt attribute. 2019-09-25 18:58:07 +00:00
Mips Add an operand to memory intrinsics to denote the "tail" marker. 2019-09-28 05:33:21 +00:00
NVPTX
PowerPC [PowerPC] make tests immune to improved undef handling 2019-09-28 13:34:53 +00:00
RISCV [RISCV] Switch to the Machine Scheduler 2019-09-17 11:15:35 +00:00
SPARC [test] Fix tests when run on windows after SVN r369426. NFC. 2019-08-20 20:58:02 +00:00
SystemZ [SystemZ] Add SystemZPostRewrite in addPostRegAlloc() instead at -O0. 2019-09-30 07:29:54 +00:00
Thumb [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
Thumb2 [NFC][ARM] Add some tail-predication tests 2019-09-27 10:33:53 +00:00
WebAssembly [WebAssembly] v128.andnot 2019-09-27 02:11:40 +00:00
WinCFGuard
WinEH [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
X86 [X86] Split v16i32/v8i64 bitreverse on avx512f targets without avx512bw to enable the use of vpshufb on the 256-bit halves. 2019-09-30 03:14:38 +00:00
XCore