forked from OSchip/llvm-project
65 lines
1.7 KiB
YAML
65 lines
1.7 KiB
YAML
# RUN: yaml2obj %s -o %t
|
|
# RUN: llvm-readobj -A %t | FileCheck -check-prefix=OBJ %s
|
|
# RUN: obj2yaml %t | FileCheck -check-prefix=YAML %s
|
|
|
|
# OBJ: MIPS ABI Flags {
|
|
# OBJ-NEXT: Version: 0
|
|
# OBJ-NEXT: ISA: MIPS64r5
|
|
# OBJ-NEXT: ISA Extension: Cavium Networks Octeon3 (0x13)
|
|
# OBJ-NEXT: ASEs [ (0x103)
|
|
# OBJ-NEXT: DSP (0x1)
|
|
# OBJ-NEXT: DSPR2 (0x2)
|
|
# OBJ-NEXT: VZ (0x100)
|
|
# OBJ-NEXT: ]
|
|
# OBJ-NEXT: FP ABI: Hard float (double precision) (0x1)
|
|
# OBJ-NEXT: GPR size: 64
|
|
# OBJ-NEXT: CPR1 size: 64
|
|
# OBJ-NEXT: CPR2 size: 0
|
|
# OBJ-NEXT: Flags 1 [ (0x1)
|
|
# OBJ-NEXT: ODDSPREG (0x1)
|
|
# OBJ-NEXT: ]
|
|
# OBJ-NEXT: Flags 2: 0x0
|
|
# OBJ-NEXT: }
|
|
|
|
# YAML: Sections:
|
|
# YAML-NEXT: - Name: .MIPS.abiflags
|
|
# YAML-NEXT: Type: SHT_MIPS_ABIFLAGS
|
|
# YAML-NEXT: AddressAlign: 0x0000000000000008
|
|
# YAML-NEXT: EntSize: 0x0000000000000018
|
|
# YAML-NEXT: ISA: MIPS64
|
|
# YAML-NEXT: ISARevision: 0x05
|
|
# YAML-NEXT: ISAExtension: EXT_OCTEON3
|
|
# YAML-NEXT: ASEs: [ DSP, DSPR2, VIRT ]
|
|
# YAML-NEXT: FpABI: FP_DOUBLE
|
|
# YAML-NEXT: GPRSize: REG_64
|
|
# YAML-NEXT: CPR1Size: REG_64
|
|
# YAML-NEXT: Flags1: [ ODDSPREG ]
|
|
|
|
!ELF
|
|
FileHeader:
|
|
Class: ELFCLASS64
|
|
Data: ELFDATA2MSB
|
|
Type: ET_REL
|
|
Machine: EM_MIPS
|
|
|
|
Sections:
|
|
- Name: .MIPS.abiflags
|
|
Type: SHT_MIPS_ABIFLAGS
|
|
AddressAlign: 8
|
|
Version: 0
|
|
ISA: MIPS64
|
|
ISARevision: 5
|
|
ISAExtension: EXT_OCTEON3
|
|
ASEs: [ DSP, DSPR2, VIRT ]
|
|
FpABI: FP_DOUBLE
|
|
GPRSize: REG_64
|
|
CPR1Size: REG_64
|
|
CPR2Size: REG_NONE
|
|
Flags1: [ ODDSPREG ]
|
|
Flags2: 0x0
|
|
|
|
Symbols:
|
|
- Name: .MIPS.abiflags
|
|
Type: STT_SECTION
|
|
Section: .MIPS.abiflags
|