forked from OSchip/llvm-project
50 lines
1.9 KiB
YAML
50 lines
1.9 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=riscv64 -mattr=+experimental-v -stop-after=prologepilog %s -o - 2>&1 | FileCheck %s
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--- |
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target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
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target triple = "riscv64"
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define void @zvlsseg_spill(i64 *%base, i64 %vl) {
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ret void
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}
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...
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---
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name: zvlsseg_spill
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tracksRegLiveness: true
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stack:
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- { id: 0, offset: 0, size: 64, alignment: 8, stack-id: scalable-vector }
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body: |
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bb.0:
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liveins: $x10, $x11
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; CHECK-LABEL: name: zvlsseg_spill
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; CHECK: liveins: $x10, $x11
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; CHECK: $x2 = frame-setup ADDI $x2, -16
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; CHECK: CFI_INSTRUCTION def_cfa_offset 16
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; CHECK: $x12 = PseudoReadVLENB
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; CHECK: $x12 = SLLI killed $x12, 3
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; CHECK: $x2 = SUB $x2, killed $x12
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; CHECK: dead renamable $x11 = PseudoVSETVLI killed renamable $x11, 88, implicit-def $vl, implicit-def $vtype
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; CHECK: $v0_v1_v2_v3_v4_v5_v6 = PseudoVLSEG7E64_V_M1 renamable $x10, $noreg, 6, implicit $vl, implicit $vtype
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; CHECK: $x11 = ADDI $x2, 16
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; CHECK: $x12 = PseudoReadVLENB
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; CHECK: PseudoVSPILL7_M1 killed renamable $v0_v1_v2_v3_v4_v5_v6, killed $x11, killed $x12
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; CHECK: $x11 = ADDI $x2, 16
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; CHECK: $x12 = PseudoReadVLENB
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; CHECK: dead renamable $v7_v8_v9_v10_v11_v12_v13 = PseudoVRELOAD7_M1 killed $x11, killed $x12, implicit-def $v8
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; CHECK: VS1R_V killed $v8, killed renamable $x10
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; CHECK: $x10 = PseudoReadVLENB
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; CHECK: $x10 = SLLI killed $x10, 3
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; CHECK: $x2 = ADD $x2, killed $x10
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; CHECK: $x2 = frame-destroy ADDI $x2, 16
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; CHECK: PseudoRET
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%0:gpr = COPY $x10
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%1:gpr = COPY $x11
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$v0_v1_v2_v3_v4_v5_v6 = PseudoVLSEG7E64_V_M1 %0, %1, 6
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PseudoVSPILL7_M1 killed renamable $v0_v1_v2_v3_v4_v5_v6, %stack.0, $x0
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renamable $v7_v8_v9_v10_v11_v12_v13 = PseudoVRELOAD7_M1 %stack.0, $x0
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VS1R_V killed $v8, %0:gpr
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PseudoRET
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...
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