forked from OSchip/llvm-project
25 lines
922 B
LLVM
25 lines
922 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -tbaa -instcombine -S < %s | FileCheck %s
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; Check that load to load forwarding works with non aliasing store inbetween.
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define i32 @test_load_store_load_combine(i32*, float*) {
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; CHECK-LABEL: @test_load_store_load_combine(
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; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[TMP0:%.*]], align 4, !tbaa [[TBAA0:![0-9]+]]
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; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[A]] to float
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; CHECK-NEXT: store float [[F]], float* [[TMP1:%.*]], align 4, !tbaa [[TBAA4:![0-9]+]]
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; CHECK-NEXT: ret i32 [[A]]
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;
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%a = load i32, i32* %0, align 4, !tbaa !0
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%f = sitofp i32 %a to float
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store float %f, float* %1, align 4, !tbaa !4
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%b = load i32, i32* %0, align 4, !tbaa !0
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ret i32 %b
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}
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!0 = !{!1, !1, i64 0}
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!1 = !{!"int", !2, i64 0}
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!2 = !{!"omnipotent char", !3, i64 0}
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!3 = !{!"Simple C++ TBAA"}
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!4 = !{!5, !5, i64 0}
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!5 = !{!"float", !2, i64 0}
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