forked from OSchip/llvm-project
33 lines
1.4 KiB
ArmAsm
33 lines
1.4 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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ldnf1sw z0.d, p0/z, [x0]
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// CHECK-INST: ldnf1sw { z0.d }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0x90,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 90 a4 <unknown>
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ldnf1sw { z0.d }, p0/z, [x0]
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// CHECK-INST: ldnf1sw { z0.d }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0x90,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 90 a4 <unknown>
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ldnf1sw { z31.d }, p7/z, [sp, #-1, mul vl]
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// CHECK-INST: ldnf1sw { z31.d }, p7/z, [sp, #-1, mul vl]
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// CHECK-ENCODING: [0xff,0xbf,0x9f,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff bf 9f a4 <unknown>
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ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl]
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// CHECK-INST: ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl]
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// CHECK-ENCODING: [0x55,0xb5,0x95,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 b5 95 a4 <unknown>
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