forked from OSchip/llvm-project
45 lines
1.7 KiB
ArmAsm
45 lines
1.7 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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fcmeq p0.h, p0/z, z0.h, #0.0
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// CHECK-INST: fcmeq p0.h, p0/z, z0.h, #0.0
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// CHECK-ENCODING: [0x00,0x20,0x52,0x65]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 20 52 65 <unknown>
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fcmeq p0.s, p0/z, z0.s, #0.0
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// CHECK-INST: fcmeq p0.s, p0/z, z0.s, #0.0
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// CHECK-ENCODING: [0x00,0x20,0x92,0x65]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 20 92 65 <unknown>
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fcmeq p0.d, p0/z, z0.d, #0.0
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// CHECK-INST: fcmeq p0.d, p0/z, z0.d, #0.0
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// CHECK-ENCODING: [0x00,0x20,0xd2,0x65]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 20 d2 65 <unknown>
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fcmeq p0.h, p0/z, z0.h, z1.h
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// CHECK-INST: fcmeq p0.h, p0/z, z0.h, z1.h
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// CHECK-ENCODING: [0x00,0x60,0x41,0x65]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 60 41 65 <unknown>
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fcmeq p0.s, p0/z, z0.s, z1.s
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// CHECK-INST: fcmeq p0.s, p0/z, z0.s, z1.s
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// CHECK-ENCODING: [0x00,0x60,0x81,0x65]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 60 81 65 <unknown>
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fcmeq p0.d, p0/z, z0.d, z1.d
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// CHECK-INST: fcmeq p0.d, p0/z, z0.d, z1.d
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// CHECK-ENCODING: [0x00,0x60,0xc1,0x65]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 60 c1 65 <unknown>
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