forked from OSchip/llvm-project
173 lines
5.7 KiB
ArmAsm
173 lines
5.7 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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eor z5.b, z5.b, #0xf9
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// CHECK-INST: eor z5.b, z5.b, #0xf9
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// CHECK-ENCODING: [0xa5,0x2e,0x40,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: a5 2e 40 05 <unknown>
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eor z23.h, z23.h, #0xfff9
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// CHECK-INST: eor z23.h, z23.h, #0xfff9
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// CHECK-ENCODING: [0xb7,0x6d,0x40,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: b7 6d 40 05 <unknown>
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eor z0.s, z0.s, #0xfffffff9
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// CHECK-INST: eor z0.s, z0.s, #0xfffffff9
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// CHECK-ENCODING: [0xa0,0xeb,0x40,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: a0 eb 40 05 <unknown>
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eor z0.d, z0.d, #0xfffffffffffffff9
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// CHECK-INST: eor z0.d, z0.d, #0xfffffffffffffff9
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// CHECK-ENCODING: [0xa0,0xef,0x43,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: a0 ef 43 05 <unknown>
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eor z5.b, z5.b, #0x6
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// CHECK-INST: eor z5.b, z5.b, #0x6
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// CHECK-ENCODING: [0x25,0x3e,0x40,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 25 3e 40 05 <unknown>
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eor z23.h, z23.h, #0x6
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// CHECK-INST: eor z23.h, z23.h, #0x6
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// CHECK-ENCODING: [0x37,0x7c,0x40,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 37 7c 40 05 <unknown>
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eor z0.s, z0.s, #0x6
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// CHECK-INST: eor z0.s, z0.s, #0x6
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// CHECK-ENCODING: [0x20,0xf8,0x40,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 20 f8 40 05 <unknown>
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eor z0.d, z0.d, #0x6
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// CHECK-INST: eor z0.d, z0.d, #0x6
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// CHECK-ENCODING: [0x20,0xf8,0x43,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 20 f8 43 05 <unknown>
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eor z23.d, z13.d, z8.d
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// CHECK-INST: eor z23.d, z13.d, z8.d
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// CHECK-ENCODING: [0xb7,0x31,0xa8,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: b7 31 a8 04 <unknown>
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eor z0.d, z0.d, z0.d
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// CHECK-INST: eor z0.d, z0.d, z0.d
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// CHECK-ENCODING: [0x00,0x30,0xa0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 30 a0 04 <unknown>
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eor z31.s, p7/m, z31.s, z31.s
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// CHECK-INST: eor z31.s, p7/m, z31.s, z31.s
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// CHECK-ENCODING: [0xff,0x1f,0x99,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 1f 99 04 <unknown>
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eor z31.h, p7/m, z31.h, z31.h
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// CHECK-INST: eor z31.h, p7/m, z31.h, z31.h
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// CHECK-ENCODING: [0xff,0x1f,0x59,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 1f 59 04 <unknown>
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eor z31.d, p7/m, z31.d, z31.d
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// CHECK-INST: eor z31.d, p7/m, z31.d, z31.d
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// CHECK-ENCODING: [0xff,0x1f,0xd9,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 1f d9 04 <unknown>
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eor z31.b, p7/m, z31.b, z31.b
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// CHECK-INST: eor z31.b, p7/m, z31.b, z31.b
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// CHECK-ENCODING: [0xff,0x1f,0x19,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 1f 19 04 <unknown>
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eor p0.b, p0/z, p0.b, p1.b
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// CHECK-INST: eor p0.b, p0/z, p0.b, p1.b
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// CHECK-ENCODING: [0x00,0x42,0x01,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 42 01 25 <unknown>
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eor p0.b, p0/z, p0.b, p0.b
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// CHECK-INST: not p0.b, p0/z, p0.b
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// CHECK-ENCODING: [0x00,0x42,0x00,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 42 00 25 <unknown>
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eor p15.b, p15/z, p15.b, p15.b
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// CHECK-INST: not p15.b, p15/z, p15.b
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// CHECK-ENCODING: [0xef,0x7f,0x0f,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ef 7f 0f 25 <unknown>
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// --------------------------------------------------------------------------//
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// Test aliases.
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eor z0.s, z0.s, z0.s
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// CHECK-INST: eor z0.d, z0.d, z0.d
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// CHECK-ENCODING: [0x00,0x30,0xa0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 30 a0 04 <unknown>
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eor z0.h, z0.h, z0.h
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// CHECK-INST: eor z0.d, z0.d, z0.d
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// CHECK-ENCODING: [0x00,0x30,0xa0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 30 a0 04 <unknown>
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eor z0.b, z0.b, z0.b
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// CHECK-INST: eor z0.d, z0.d, z0.d
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// CHECK-ENCODING: [0x00,0x30,0xa0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 30 a0 04 <unknown>
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// --------------------------------------------------------------------------//
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// Test compatibility with MOVPRFX instruction.
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movprfx z4.b, p7/z, z6.b
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// CHECK-INST: movprfx z4.b, p7/z, z6.b
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// CHECK-ENCODING: [0xc4,0x3c,0x10,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: c4 3c 10 04 <unknown>
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eor z4.b, p7/m, z4.b, z31.b
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// CHECK-INST: eor z4.b, p7/m, z4.b, z31.b
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// CHECK-ENCODING: [0xe4,0x1f,0x19,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e4 1f 19 04 <unknown>
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movprfx z4, z6
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// CHECK-INST: movprfx z4, z6
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// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
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eor z4.b, p7/m, z4.b, z31.b
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// CHECK-INST: eor z4.b, p7/m, z4.b, z31.b
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// CHECK-ENCODING: [0xe4,0x1f,0x19,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e4 1f 19 04 <unknown>
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movprfx z0, z7
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// CHECK-INST: movprfx z0, z7
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// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
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eor z0.d, z0.d, #0x6
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// CHECK-INST: eor z0.d, z0.d, #0x6
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// CHECK-ENCODING: [0x20,0xf8,0x43,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 20 f8 43 05 <unknown>
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