llvm-project/llvm/test/CodeGen
Philip Reames b172cd7812 [Statepoint] Factor out logic for non-stack non-vreg lowering [almost NFC]
This is inspired by D81648.  The basic idea is to have the set of SDValues which are lowered as either constants or direct frame references explicit in one place, and to separate them clearly from the spilling logic.

This is not NFC in that the handling of constants larger than > 64 bit has changed.  The old lowering would crash on values which could not be encoded as a sign extended 64 bit value.  The new lowering just spills all constants > 64 bits.  We could be consistent about doing the sext(Con64) optimization, but I happen to know that this code path is utterly unexercised in practice, so simple is better for now.
2020-07-07 13:34:28 -07:00
..
AArch64 [SVE][CodeGen] Legalisation of unpredicated store instructions 2020-07-07 11:47:10 +01:00
AMDGPU AMDGPU: Don't ignore carry out user when expanding add_co_pseudo 2020-07-06 14:28:01 -04:00
ARC
ARM [ARM] Remove hasSideEffects from FP converts 2020-07-05 16:23:24 +01:00
AVR [AVR] Rewrite the function calling convention. 2020-06-23 21:36:18 +12:00
BPF [BPF] Fix a BTF gen bug related to a pointer struct member 2020-07-01 09:55:01 -07:00
Generic [LLParser] Delete temp CallInst when error occurs 2020-06-16 11:41:25 +08:00
Hexagon [BasicAA] Rename deprecated -basicaa to -basic-aa 2020-06-26 20:41:37 -07:00
Inputs
Lanai
MIR [MIR] Fix CFI_INSTRUCTION escape printing 2020-06-24 18:15:28 -04:00
MSP430 [MSP430] Declare comparison LibCalls as returning i16 instead of i32 2020-06-30 11:04:22 +03:00
Mips [DAGCombine] Generalize the case (add (or x, c1), c2) -> (add x, (c1 + c2)) 2020-06-12 13:53:08 -04:00
NVPTX [NVPTX] Fix for NVPTX module asm regression 2020-06-24 11:17:09 -07:00
PowerPC [PowerPC] Implement Vector Replace Builtins in LLVM 2020-07-07 12:22:52 -05:00
RISCV [RISCV] Fold ADDIs into load/stores with nonzero offsets 2020-07-06 17:32:57 +01:00
SPARC [SPARC] Lower fp16 ops to libcalls 2020-06-10 19:15:26 -07:00
SystemZ [SystemZ] Simplify knownbits.ll test 2020-06-30 16:31:59 +02:00
Thumb
Thumb2 [ARM] Remove hasSideEffects from FP converts 2020-07-05 16:23:24 +01:00
VE [VE] Support symbol with offset value 2020-07-01 23:55:27 +09:00
WebAssembly [WebAssembly] Avoid scalarizing vector shifts in more cases 2020-07-07 10:45:26 -07:00
WinCFGuard
WinEH
X86 [Statepoint] Factor out logic for non-stack non-vreg lowering [almost NFC] 2020-07-07 13:34:28 -07:00
XCore