llvm-project/llvm/test/CodeGen
Matt Arsenault 53f21e0fb7 TableGen/GlobalISel: Hack the operand order for atomic_store
ISD::ATOMIC_STORE arbitrarily has the operands in the opposite order
from regular ISD::STORE, which always introduced an annoying
duplication of patterns to handle both cases. Since in GlobalISel
there's just the one G_STORE, we need to swap the operands to
correctly emit the type check for the pointer operand.

Some work started in 20aafa3156 to
migrate SelectionDAG to use ISD::STORE for atomics, but that work
seems to have stalled. Since this is the pretty much the last
operation which matters which isn't supported for AMDGPU, use this
compatibility hack to unblock declaring it functionally complete.

Not sure what's going on with the pending_phis AArch64 test. It seems
it didn't always use atomics, and I'm not sure what it was originally
testing matters anymore.
2020-08-11 10:22:44 -04:00
..
AArch64 TableGen/GlobalISel: Hack the operand order for atomic_store 2020-08-11 10:22:44 -04:00
AMDGPU TableGen/GlobalISel: Hack the operand order for atomic_store 2020-08-11 10:22:44 -04:00
ARC
ARM [ARM] Unrestrict Armv8-a IT when at minsize 2020-08-10 14:59:53 +01:00
AVR
BPF BPF: add a SimplifyCFG IR pass during generic Scalar/IPO optimization 2020-08-06 13:16:00 -07:00
Generic [llc] (almost) remove `--print-machineinstrs` 2020-07-20 10:43:28 -07:00
Hexagon [Hexagon] Use InstSimplify instead of ConstantProp 2020-08-04 15:42:39 -07:00
Inputs
Lanai
MIR AMDGPU: Serialize MFI spill fields 2020-07-28 20:01:57 -04:00
MSP430
Mips [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
NVPTX
PowerPC Add missing `-o -` to a recent test 2020-08-11 06:00:11 -04:00
RISCV [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
SPARC [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
SystemZ [LegalTypes] Move VSELECT node creation out of WidenVSELECTAndMask and push to 2 of the 3 callers. 2020-08-06 13:18:16 -07:00
Thumb
Thumb2 [ARM][MVE] Added extra tail-predication runs for auto-correlation test case. NFC 2020-08-11 14:33:41 +01:00
VE [VE] Update bit operations 2020-08-11 19:42:12 +09:00
WebAssembly [WebAssembly] Fix FastISel address calculation bug 2020-08-08 15:23:11 -07:00
WinCFGuard
WinEH
X86 [X86][SSE] Add tests for 256-bit HOP(SHUFFLE(X,Y),SHUFFLE(X,Y)) --> SHUFFLE(HOP(X,Y)) patterns 2020-08-11 14:02:01 +01:00
XCore