llvm-project/llvm/test/CodeGen/AMDGPU/nop-fold.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc --mtriple=amdgcn--amdhsa -mcpu=fiji -run-pass=si-shrink-instructions %s -o - | FileCheck %s
---
name: merge_2_nop
tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: merge_2_nop
; CHECK: S_NOP 1
S_NOP 0
S_NOP 0
...
---
name: merge_3_nop
tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: merge_3_nop
; CHECK: S_NOP 2
S_NOP 0
S_NOP 0
S_NOP 0
...
---
name: merge_7_nop
tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: merge_7_nop
; CHECK: S_NOP 6
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
...
---
name: merge_8_nop
tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: merge_8_nop
; CHECK: S_NOP 7
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
...
---
name: merge_9_nop
tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: merge_9_nop
; CHECK: S_NOP 7
; CHECK: S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
...
---
name: no_merge_impdef0
tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: no_merge_impdef0
; CHECK: S_NOP 0, implicit-def $sgpr0
; CHECK: S_NOP 0
S_NOP 0, implicit-def $sgpr0
S_NOP 0
...
---
name: no_merge_impdef1
tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: no_merge_impdef1
; CHECK: S_NOP 0
; CHECK: S_NOP 0, implicit-def $sgpr0
S_NOP 0
S_NOP 0, implicit-def $sgpr0
...
---
name: no_merge_impdef_both
tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: no_merge_impdef_both
; CHECK: S_NOP 0
; CHECK: S_NOP 0, implicit-def $sgpr0
S_NOP 0
S_NOP 0, implicit-def $sgpr0
...