forked from OSchip/llvm-project
376 lines
16 KiB
ArmAsm
376 lines
16 KiB
ArmAsm
// REQUIRES: arm
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// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
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// RUN: echo "SECTIONS { \
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// RUN: . = SIZEOF_HEADERS; \
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// RUN: .R_ARM_JUMP24_callee_1 : { *(.R_ARM_JUMP24_callee_low) } \
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// RUN: .R_ARM_THM_JUMP_callee_1 : { *(.R_ARM_THM_JUMP_callee_low)} \
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// RUN: .text : { *(.text) } \
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// RUN: .arm_caller : { *(.arm_caller) } \
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// RUN: .thumb_caller : { *(.thumb_caller) } \
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// RUN: .R_ARM_JUMP24_callee_2 : { *(.R_ARM_JUMP24_callee_high) } \
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// RUN: .R_ARM_THM_JUMP_callee_2 : { *(.R_ARM_THM_JUMP_callee_high) } \
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// RUN: .got.plt 0x18b4 : { } } " > %t.script
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// RUN: ld.lld --script %t.script %t -o %t2
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// RUN: llvm-objdump -d --no-show-raw-insn %t2 | FileCheck --check-prefix=CHECK-THUMB --check-prefix=CHECK-ABS-THUMB %s
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// RUN: llvm-objdump -d --no-show-raw-insn --triple=armv7a-none-linux-gnueabi %t2 | FileCheck --check-prefix=CHECK-ARM --check-prefix=CHECK-ARM-ABS-ARM %s
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// RUN: ld.lld --script %t.script %t -pie -o %t3
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// RUN: llvm-objdump -d --no-show-raw-insn %t3 | FileCheck --check-prefix=CHECK-THUMB --check-prefix=CHECK-PI-THUMB %s
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// RUN: llvm-objdump -d --no-show-raw-insn --triple=armv7a-none-linux-gnueabi %t3 | FileCheck --check-prefix=CHECK-ARM --check-prefix=CHECK-PI-ARM %s
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// RUN: ld.lld --script %t.script %t --shared -o %t4
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// RUN: llvm-readobj -S -r %t4 | FileCheck -check-prefix=CHECK-DSO-REL %s
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// RUN: llvm-objdump -d --no-show-raw-insn --triple=armv7a-none-linux-gnueabi %t4 | FileCheck -check-prefix=CHECK-ARM-PLT %s
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/// Test ARM Thumb Interworking
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/// The file is linked and checked 3 times to check the following contexts
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/// - Absolute executables, absolute Thunks are used.
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/// - Position independent executables, position independent Thunks are used.
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/// - Shared object, position independent Thunks to PLT entries are used.
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.syntax unified
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/// Target Sections for thunks at a lower address than the callers.
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.section .R_ARM_JUMP24_callee_low, "ax", %progbits
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.thumb
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.balign 0x1000
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.globl thumb_callee1
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.type thumb_callee1, %function
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thumb_callee1:
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bx lr
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// CHECK-THUMB: Disassembly of section .R_ARM_JUMP24_callee_1:
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// CHECK-THUMB-EMPTY:
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// CHECK-THUMB: <thumb_callee1>:
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// CHECK-THUMB: 1000: bx lr
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.section .R_ARM_THM_JUMP_callee_low, "ax", %progbits
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.arm
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.balign 0x100
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.globl arm_callee1
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.type arm_callee1, %function
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arm_callee1:
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bx lr
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// Disassembly of section .R_ARM_THM_JUMP_callee_1:
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// CHECK-ARM: <arm_callee1>:
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// CHECK-ARM-NEXT: 1100: bx lr
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/// Calling sections
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/// At present ARM and Thumb interworking thunks are always added to the calling
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/// section.
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.section .arm_caller, "ax", %progbits
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.arm
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.balign 0x100
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.globl arm_caller
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.type arm_caller, %function
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arm_caller:
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/// If target supports BLX and target is in range we don't need an
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/// interworking thunk for a BL or BLX instruction.
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bl thumb_callee1
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blx thumb_callee1
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/// A B instruction can't be transformed into a BLX and needs an interworking
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/// thunk.
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b thumb_callee1
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/// As long as the thunk is in range it can be reused.
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b thumb_callee1
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/// There can be more than one thunk associated with a section.
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b thumb_callee2
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b thumb_callee3
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/// In range ARM targets do not require interworking thunks.
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b arm_callee1
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beq arm_callee2
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bne arm_callee3
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bx lr
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// CHECK-ARM-ABS-ARM: Disassembly of section .arm_caller:
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// CHECK-ARM-ABS-ARM-EMPTY:
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// CHECK-ARM-ABS-ARM-NEXT: <arm_caller>:
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// CHECK-ARM-ABS-ARM-NEXT: 1300: blx 0x1000 <thumb_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 1304: blx 0x1000 <thumb_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 1308: b 0x1328 <__ARMv7ABSLongThunk_thumb_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 130c: b 0x1328 <__ARMv7ABSLongThunk_thumb_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 1310: b 0x1334 <__ARMv7ABSLongThunk_thumb_callee2>
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// CHECK-ARM-ABS-ARM-NEXT: 1314: b 0x1340 <__ARMv7ABSLongThunk_thumb_callee3>
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// CHECK-ARM-ABS-ARM-NEXT: 1318: b 0x1100 <arm_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 131c: beq 0x1600 <arm_callee2>
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// CHECK-ARM-ABS-ARM-NEXT: 1320: bne 0x1604 <arm_callee3>
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// CHECK-ARM-ABS-ARM-NEXT: 1324: bx lr
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// CHECK-ARM-ABS-ARM: <__ARMv7ABSLongThunk_thumb_callee1>:
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// 0x1001 = thumb_callee1
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// CHECK-ARM-ABS-ARM-NEXT: 1328: movw r12, #4097
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// CHECK-ARM-ABS-ARM-NEXT: 132c: movt r12, #0
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// CHECK-ARM-ABS-ARM-NEXT: 1330: bx r12
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// 0x1501 = thumb_callee2
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// CHECK-ARM-ABS-ARM: <__ARMv7ABSLongThunk_thumb_callee2>:
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// CHECK-ARM-ABS-ARM-NEXT: 1334: movw r12, #5377
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// CHECK-ARM-ABS-ARM-NEXT: 1338: movt r12, #0
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// CHECK-ARM-ABS-ARM-NEXT: 133c: bx r12
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// 0x1503 = thumb_callee3
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// CHECK-ARM-ABS-ARM: <__ARMv7ABSLongThunk_thumb_callee3>:
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// CHECK-ARM-ABS-ARM-NEXT: 1340: movw r12, #5379
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// CHECK-ARM-ABS-ARM-NEXT: 1344: movt r12, #0
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// CHECK-ARM-ABS-ARM-NEXT: 1348: bx r12
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// CHECK-PI-ARM: Disassembly of section .arm_caller:
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// CHECK-PI-ARM-EMPTY:
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// CHECK-PI-ARM-NEXT: <arm_caller>:
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// CHECK-PI-ARM-NEXT: 1300: blx 0x1000 <thumb_callee1>
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// CHECK-PI-ARM-NEXT: 1304: blx 0x1000 <thumb_callee1>
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// CHECK-PI-ARM-NEXT: 1308: b 0x1328 <__ARMV7PILongThunk_thumb_callee1>
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// CHECK-PI-ARM-NEXT: 130c: b 0x1328 <__ARMV7PILongThunk_thumb_callee1>
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// CHECK-PI-ARM-NEXT: 1310: b 0x1338 <__ARMV7PILongThunk_thumb_callee2>
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// CHECK-PI-ARM-NEXT: 1314: b 0x1348 <__ARMV7PILongThunk_thumb_callee3>
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// CHECK-PI-ARM-NEXT: 1318: b 0x1100 <arm_callee1>
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// CHECK-PI-ARM-NEXT: 131c: beq 0x1600 <arm_callee2>
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// CHECK-PI-ARM-NEXT: 1320: bne 0x1604 <arm_callee3>
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// CHECK-PI-ARM-NEXT: 1324: bx lr
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// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee1>:
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// CHECK-PI-ARM-NEXT: 1328: movw r12, #64713
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// CHECK-PI-ARM-NEXT: 132c: movt r12, #65535
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// CHECK-PI-ARM-NEXT: 1330: add r12, r12, pc
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// CHECK-PI-ARM-NEXT: 1334: bx r12
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// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee2>:
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// CHECK-PI-ARM-NEXT: 1338: movw r12, #441
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// CHECK-PI-ARM-NEXT: 133c: movt r12, #0
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// CHECK-PI-ARM-NEXT: 1340: add r12, r12, pc
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// CHECK-PI-ARM-NEXT: 1344: bx r12
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// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee3>:
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// CHECK-PI-ARM-NEXT: 1348: movw r12, #427
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// CHECK-PI-ARM-NEXT: 134c: movt r12, #0
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// CHECK-PI-ARM-NEXT: 1350: add r12, r12, pc
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// CHECK-PI-ARM-NEXT: 1354: bx r12
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/// All PLT entries are ARM, callers via PLT no need for interworking thunks.
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// CHECK-ARM-PLT: Disassembly of section .arm_caller:
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// CHECK-ARM-PLT-EMPTY:
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// CHECK-ARM-PLT-NEXT: <arm_caller>:
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// CHECK-ARM-PLT-NEXT: 1300: bl 0x1650
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// CHECK-ARM-PLT-NEXT: 1304: bl 0x1650
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// CHECK-ARM-PLT-NEXT: 1308: b 0x1650
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// CHECK-ARM-PLT-NEXT: 130c: b 0x1650
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// CHECK-ARM-PLT-NEXT: 1310: b 0x1660
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// CHECK-ARM-PLT-NEXT: 1314: b 0x1670
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// CHECK-ARM-PLT-NEXT: 1318: b 0x1680
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// CHECK-ARM-PLT-NEXT: 131c: beq 0x1690
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// CHECK-ARM-PLT-NEXT: 1320: bne 0x16a0
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// CHECK-ARM-PLT-NEXT: 1324: bx lr
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.section .thumb_caller, "ax", %progbits
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.balign 0x100
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.thumb
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.globl thumb_caller
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.type thumb_caller, %function
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thumb_caller:
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/// If target supports BLX and target is in range we don't need an
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/// interworking thunk for a BL or BLX instruction.
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bl arm_callee1
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blx arm_callee1
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/// A B instruction can't be transformed into a BLX and needs an interworking
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/// thunk
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b.w arm_callee1
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/// As long as the thunk is in range it can be reused
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b.w arm_callee2
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/// There can be more than one thunk associated with a section
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b.w arm_callee3
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/// Conditional branches also require interworking thunks, they can use the
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/// same interworking thunks.
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beq.w arm_callee1
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beq.w arm_callee2
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bne.w arm_callee3
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// CHECK-ABS-THUMB: Disassembly of section .thumb_caller:
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// CHECK-ABS-THUMB-EMPTY:
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// CHECK-ABS-THUMB-NEXT: <thumb_caller>:
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// CHECK-ABS-THUMB-NEXT: 1400: blx 0x1100 <arm_callee1>
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// CHECK-ABS-THUMB-NEXT: 1404: blx 0x1100 <arm_callee1>
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// CHECK-ABS-THUMB-NEXT: 1408: b.w 0x1420 <__Thumbv7ABSLongThunk_arm_callee1>
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// CHECK-ABS-THUMB-NEXT: 140c: b.w 0x142a <__Thumbv7ABSLongThunk_arm_callee2>
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// CHECK-ABS-THUMB-NEXT: 1410: b.w 0x1434 <__Thumbv7ABSLongThunk_arm_callee3>
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// CHECK-ABS-THUMB-NEXT: 1414: beq.w 0x1420 <__Thumbv7ABSLongThunk_arm_callee1>
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// CHECK-ABS-THUMB-NEXT: 1418: beq.w 0x142a <__Thumbv7ABSLongThunk_arm_callee2>
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// CHECK-ABS-THUMB-NEXT: 141c: bne.w 0x1434 <__Thumbv7ABSLongThunk_arm_callee3>
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// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee1>:
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// CHECK-ABS-THUMB-NEXT: 1420: movw r12, #4352
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// CHECK-ABS-THUMB-NEXT: 1424: movt r12, #0
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// CHECK-ABS-THUMB-NEXT: 1428: bx r12
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// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee2>:
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// CHECK-ABS-THUMB-NEXT: 142a: movw r12, #5632
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// CHECK-ABS-THUMB-NEXT: 142e: movt r12, #0
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// CHECK-ABS-THUMB-NEXT: 1432: bx r12
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// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee3>:
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// CHECK-ABS-THUMB-NEXT: 1434: movw r12, #5636
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// CHECK-ABS-THUMB-NEXT: 1438: movt r12, #0
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// CHECK-ABS-THUMB-NEXT: 143c: bx r12
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// CHECK-PI-THUMB: Disassembly of section .thumb_caller:
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// CHECK-PI-THUMB-EMPTY:
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// CHECK-PI-THUMB-NEXT: <thumb_caller>:
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// CHECK-PI-THUMB-NEXT: 1400: blx 0x1100 <arm_callee1>
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// CHECK-PI-THUMB-NEXT: 1404: blx 0x1100 <arm_callee1>
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// CHECK-PI-THUMB-NEXT: 1408: b.w 0x1420 <__ThumbV7PILongThunk_arm_callee1>
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// CHECK-PI-THUMB-NEXT: 140c: b.w 0x142c <__ThumbV7PILongThunk_arm_callee2>
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// CHECK-PI-THUMB-NEXT: 1410: b.w 0x1438 <__ThumbV7PILongThunk_arm_callee3>
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// CHECK-PI-THUMB-NEXT: 1414: beq.w 0x1420 <__ThumbV7PILongThunk_arm_callee1>
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// CHECK-PI-THUMB-NEXT: 1418: beq.w 0x142c <__ThumbV7PILongThunk_arm_callee2>
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// CHECK-PI-THUMB-NEXT: 141c: bne.w 0x1438 <__ThumbV7PILongThunk_arm_callee3>
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// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee1>:
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// CHECK-PI-THUMB-NEXT: 1420: movw r12, #64724
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// CHECK-PI-THUMB-NEXT: 1424: movt r12, #65535
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// CHECK-PI-THUMB-NEXT: 1428: add r12, pc
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// CHECK-PI-THUMB-NEXT: 142a: bx r12
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// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee2>:
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// CHECK-PI-THUMB-NEXT: 142c: movw r12, #456
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// CHECK-PI-THUMB-NEXT: 1430: movt r12, #0
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// CHECK-PI-THUMB-NEXT: 1434: add r12, pc
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// CHECK-PI-THUMB-NEXT: 1436: bx r12
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// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee3>:
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// CHECK-PI-THUMB-NEXT: 1438: movw r12, #448
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// CHECK-PI-THUMB-NEXT: 143c: movt r12, #0
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// CHECK-PI-THUMB-NEXT: 1440: add r12, pc
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// CHECK-PI-THUMB-NEXT: 1442: bx r12
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/// Thumb calls need to change state to reach PLT
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/// bl can change to blx to PLT entries, branches
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/// need a state change thunk.
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// CHECK-ARM-PLT: Disassembly of section .thumb_caller:
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// CHECK-ARM-PLT-EMPTY:
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// CHECK-ARM-PLT-NEXT: <thumb_caller>:
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// CHECK-ARM-PLT-NEXT: 1400: blx 0x1680
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// CHECK-ARM-PLT-NEXT: 1404: blx 0x1680
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// CHECK-ARM-PLT-NEXT: 1408: b.w 0x1420 <__ThumbV7PILongThunk_arm_callee1>
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// CHECK-ARM-PLT-NEXT: 140c: b.w 0x142c <__ThumbV7PILongThunk_arm_callee2>
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// CHECK-ARM-PLT-NEXT: 1410: b.w 0x1438 <__ThumbV7PILongThunk_arm_callee3>
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// CHECK-ARM-PLT-NEXT: 1414: beq.w 0x1420 <__ThumbV7PILongThunk_arm_callee1>
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// CHECK-ARM-PLT-NEXT: 1418: beq.w 0x142c <__ThumbV7PILongThunk_arm_callee2>
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// CHECK-ARM-PLT-NEXT: 141c: bne.w 0x1438 <__ThumbV7PILongThunk_arm_callee3>
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/// Target Sections for thunks at a higher address than the callers.
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.section .R_ARM_JUMP24_callee_high, "ax", %progbits
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.thumb
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.balign 0x100
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.globl thumb_callee2
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.type thumb_callee2, %function
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thumb_callee2:
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bx lr
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.globl thumb_callee3
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.type thumb_callee3, %function
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thumb_callee3:
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bx lr
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// CHECK-THUMB: Disassembly of section .R_ARM_JUMP24_callee_2:
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// CHECK-THUMB-EMPTY:
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// CHECK-THUMB-NEXT: <thumb_callee2>:
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// CHECK-THUMB-NEXT: 1500: bx lr
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// CHECK-THUMB: <thumb_callee3>:
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// CHECK-THUMB-NEXT: 1502: bx lr
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.section .R_ARM_THM_JUMP_callee_high, "ax", %progbits
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.arm
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.balign 0x100
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.globl arm_callee2
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.type arm_callee2, %function
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arm_callee2:
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bx lr
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.globl arm_callee3
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.type arm_callee3, %function
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arm_callee3:
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bx lr
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// CHECK-ARM: Disassembly of section .R_ARM_THM_JUMP_callee_2:
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// CHECK-ARM-EMPTY:
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// CHECK-ARM-NEXT: <arm_callee2>:
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// CHECK-ARM-NEXT: 1600: bx lr
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// CHECK-ARM: <arm_callee3>:
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// CHECK-ARM-NEXT: 1604: bx lr
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/// _start section just calls the arm and thumb calling sections
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.text
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.arm
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.globl _start
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.balign 0x100
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.type _start, %function
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_start:
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bl arm_caller
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bl thumb_caller
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bx lr
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// CHECK-ARM-PLT: Disassembly of section .plt:
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// CHECK-ARM-PLT-EMPTY:
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// CHECK-ARM-PLT-NEXT: 00001610 <$a>:
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// CHECK-ARM-PLT-NEXT: 1610: str lr, [sp, #-4]!
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// CHECK-ARM-PLT-NEXT: 1614: add lr, pc, #0, #12
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// CHECK-ARM-PLT-NEXT: 1618: add lr, lr, #0, #20
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// CHECK-ARM-PLT-NEXT: 161c: ldr pc, [lr, #672]!
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// CHECK-ARM-PLT-EMPTY:
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// CHECK-ARM-PLT-NEXT: 00001620 <$d>:
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// CHECK-ARM-PLT-NEXT: 1620: d4 d4 d4 d4 .word 0xd4d4d4d4
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// CHECK-ARM-PLT-NEXT: 1624: d4 d4 d4 d4 .word 0xd4d4d4d4
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// CHECK-ARM-PLT-NEXT: 1628: d4 d4 d4 d4 .word 0xd4d4d4d4
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// CHECK-ARM-PLT-NEXT: 162c: d4 d4 d4 d4 .word 0xd4d4d4d4
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// CHECK-ARM-PLT-EMPTY:
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// CHECK-ARM-PLT-NEXT: 00001630 <$a>:
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// CHECK-ARM-PLT-NEXT: 1630: add r12, pc, #0, #12
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// CHECK-ARM-PLT-NEXT: 1634: add r12, r12, #0, #20
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// CHECK-ARM-PLT-NEXT: 1638: ldr pc, [r12, #648]!
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// CHECK-ARM-PLT-EMPTY:
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// CHECK-ARM-PLT-NEXT: 0000163c <$d>:
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// CHECK-ARM-PLT-NEXT: 163c: d4 d4 d4 d4 .word 0xd4d4d4d4
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// CHECK-ARM-PLT-EMPTY:
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// CHECK-ARM-PLT-NEXT: 00001640 <$a>:
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// CHECK-ARM-PLT-NEXT: 1640: add r12, pc, #0, #12
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// CHECK-ARM-PLT-NEXT: 1644: add r12, r12, #0, #20
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// CHECK-ARM-PLT-NEXT: 1648: ldr pc, [r12, #636]!
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// CHECK-ARM-PLT-EMPTY:
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// CHECK-ARM-PLT-NEXT: 0000164c <$d>:
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// CHECK-ARM-PLT-NEXT: 164c: d4 d4 d4 d4 .word 0xd4d4d4d4
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// CHECK-ARM-PLT-EMPTY:
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// CHECK-ARM-PLT-NEXT: 00001650 <$a>:
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// CHECK-ARM-PLT-NEXT: 1650: add r12, pc, #0, #12
|
|
// CHECK-ARM-PLT-NEXT: 1654: add r12, r12, #0, #20
|
|
// CHECK-ARM-PLT-NEXT: 1658: ldr pc, [r12, #624]!
|
|
// CHECK-ARM-PLT-EMPTY:
|
|
// CHECK-ARM-PLT-NEXT: 0000165c <$d>:
|
|
// CHECK-ARM-PLT-NEXT: 165c: d4 d4 d4 d4 .word 0xd4d4d4d4
|
|
// CHECK-ARM-PLT-EMPTY:
|
|
// CHECK-ARM-PLT-NEXT: 00001660 <$a>:
|
|
// CHECK-ARM-PLT-NEXT: 1660: add r12, pc, #0, #12
|
|
// CHECK-ARM-PLT-NEXT: 1664: add r12, r12, #0, #20
|
|
// CHECK-ARM-PLT-NEXT: 1668: ldr pc, [r12, #612]!
|
|
// CHECK-ARM-PLT-EMPTY:
|
|
// CHECK-ARM-PLT-NEXT: 0000166c <$d>:
|
|
// CHECK-ARM-PLT-NEXT: 166c: d4 d4 d4 d4 .word 0xd4d4d4d4
|
|
// CHECK-ARM-PLT-EMPTY:
|
|
// CHECK-ARM-PLT-NEXT: 00001670 <$a>:
|
|
// CHECK-ARM-PLT-NEXT: 1670: add r12, pc, #0, #12
|
|
// CHECK-ARM-PLT-NEXT: 1674: add r12, r12, #0, #20
|
|
// CHECK-ARM-PLT-NEXT: 1678: ldr pc, [r12, #600]!
|
|
// CHECK-ARM-PLT-EMPTY:
|
|
// CHECK-ARM-PLT-NEXT: 0000167c <$d>:
|
|
// CHECK-ARM-PLT-NEXT: 167c: d4 d4 d4 d4 .word 0xd4d4d4d4
|
|
// CHECK-ARM-PLT-EMPTY:
|
|
// CHECK-ARM-PLT-NEXT: 00001680 <$a>:
|
|
// CHECK-ARM-PLT-NEXT: 1680: add r12, pc, #0, #12
|
|
// CHECK-ARM-PLT-NEXT: 1684: add r12, r12, #0, #20
|
|
// CHECK-ARM-PLT-NEXT: 1688: ldr pc, [r12, #588]!
|
|
// CHECK-ARM-PLT-EMPTY:
|
|
// CHECK-ARM-PLT-NEXT: 0000168c <$d>:
|
|
// CHECK-ARM-PLT-NEXT: 168c: d4 d4 d4 d4 .word 0xd4d4d4d4
|
|
// CHECK-ARM-PLT-EMPTY:
|
|
// CHECK-ARM-PLT-NEXT: 00001690 <$a>:
|
|
// CHECK-ARM-PLT-NEXT: 1690: add r12, pc, #0, #12
|
|
// CHECK-ARM-PLT-NEXT: 1694: add r12, r12, #0, #20
|
|
// CHECK-ARM-PLT-NEXT: 1698: ldr pc, [r12, #576]!
|
|
// CHECK-ARM-PLT-EMPTY:
|
|
// CHECK-ARM-PLT-NEXT: 0000169c <$d>:
|
|
// CHECK-ARM-PLT-NEXT: 169c: d4 d4 d4 d4 .word 0xd4d4d4d4
|
|
// CHECK-ARM-PLT-EMPTY:
|
|
// CHECK-ARM-PLT-NEXT: 000016a0 <$a>:
|
|
// CHECK-ARM-PLT-NEXT: 16a0: add r12, pc, #0, #12
|
|
// CHECK-ARM-PLT-NEXT: 16a4: add r12, r12, #0, #20
|
|
// CHECK-ARM-PLT-NEXT: 16a8: ldr pc, [r12, #564]!
|
|
// CHECK-ARM-PLT-EMPTY:
|
|
// CHECK-ARM-PLT-NEXT: 000016ac <$d>:
|
|
// CHECK-ARM-PLT-NEXT: 16ac: d4 d4 d4 d4 .word 0xd4d4d4d4
|
|
|
|
// CHECK-DSO-REL: 0x18C0 R_ARM_JUMP_SLOT arm_caller
|
|
// CHECK-DSO-REL-NEXT: 0x18C4 R_ARM_JUMP_SLOT thumb_caller
|
|
// CHECK-DSO-REL-NEXT: 0x18C8 R_ARM_JUMP_SLOT thumb_callee1
|
|
// CHECK-DSO-REL-NEXT: 0x18CC R_ARM_JUMP_SLOT thumb_callee2
|
|
// CHECK-DSO-REL-NEXT: 0x18D0 R_ARM_JUMP_SLOT thumb_callee3
|
|
// CHECK-DSO-REL-NEXT: 0x18D4 R_ARM_JUMP_SLOT arm_callee1
|
|
// CHECK-DSO-REL-NEXT: 0x18D8 R_ARM_JUMP_SLOT arm_callee2
|
|
// CHECK-DSO-REL-NEXT: 0x18DC R_ARM_JUMP_SLOT arm_callee3
|