forked from OSchip/llvm-project
117 lines
4.6 KiB
ArmAsm
117 lines
4.6 KiB
ArmAsm
// REQUIRES: aarch64
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// RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux %s -o %t.o
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// RUN: ld.lld --fix-cortex-a53-843419 -z separate-code %t.o -o %t2
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// RUN: llvm-objdump --triple=aarch64-linux-gnu -d %t2 --start-address=0x210000 --stop-address=0x21000c | FileCheck --check-prefix=CHECK1 %s
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// RUN: llvm-objdump --triple=aarch64-linux-gnu -d %t2 --start-address=0x211000 --stop-address=0x211004 | FileCheck --check-prefix=CHECK2 %s
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// RUN: llvm-objdump --triple=aarch64-linux-gnu -d %t2 --start-address=0x211ff8 --stop-address=0x212008 | FileCheck --check-prefix=CHECK3 %s
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// RUN: llvm-objdump --triple=aarch64-linux-gnu -d %t2 --start-address=0x4213ff8 --stop-address=0x4214008 | FileCheck --check-prefix=CHECK4 %s
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// RUN: llvm-objdump --triple=aarch64-linux-gnu -d %t2 --start-address=0x6214008 --stop-address=0x6214018 | FileCheck --check-prefix=CHECK5 %s
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// RUN: llvm-objdump --triple=aarch64-linux-gnu -d %t2 --start-address=0x821100c --stop-address=0x8211010 | FileCheck --check-prefix=CHECK6 %s
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// RUN: llvm-objdump --triple=aarch64-linux-gnu -d %t2 --start-address=0x8211ffc --stop-address=0x8212014 | FileCheck --check-prefix=CHECK7 %s
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// RUN: rm %t.o %t2
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// Test case for Cortex-A53 Erratum 843419 in an OutputSection exceeding
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// the maximum branch range. Both range extension thunks and patches are
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// required.
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// CHECK1: <__AArch64AbsLongThunk_need_thunk_after_patch>:
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// CHECK1-NEXT: 210000: 50 00 00 58 ldr x16, 0x210008
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// CHECK1-NEXT: 210004: 00 02 1f d6 br x16
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// CHECK1: <$d>:
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// CHECK1-NEXT: 210008: 0c 10 21 08 .word 0x0821100c
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.section .text.01, "ax", %progbits
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.balign 4096
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.globl _start
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.type _start, %function
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_start:
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// Expect thunk on pass 2
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bl need_thunk_after_patch
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.section .text.02, "ax", %progbits
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.space 4096 - 12
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// CHECK2: <_start>:
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// CHECK2-NEXT: 211000: 00 fc ff 97 bl 0x210000
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// Expect patch on pass 1
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.section .text.03, "ax", %progbits
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.globl t3_ff8_ldr
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.type t3_ff8_ldr, %function
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t3_ff8_ldr:
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adrp x0, dat
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ldr x1, [x1, #0]
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ldr x0, [x0, :got_lo12:dat]
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ret
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// CHECK3: <t3_ff8_ldr>:
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// CHECK3-NEXT: 211ff8: e0 00 04 f0 adrp x0, 0x8230000
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// CHECK3-NEXT: 211ffc: 21 00 40 f9 ldr x1, [x1]
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// CHECK3-NEXT: 212000: 02 08 80 15 b 0x6214008
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// CHECK3-NEXT: 212004: c0 03 5f d6 ret
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.section .text.04, "ax", %progbits
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.space 64 * 1024 * 1024
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// Expect patch on pass 1
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.section .text.05, "ax", %progbits
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.balign 4096
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.space 4096 - 8
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.globl t3_ff8_str
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.type t3_ff8_str, %function
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t3_ff8_str:
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adrp x0, dat
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ldr x1, [x1, #0]
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str x0, [x0, :got_lo12:dat]
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ret
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// CHECK4: <t3_ff8_str>:
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// CHECK4-NEXT: 4213ff8: e0 00 02 b0 adrp x0, 0x8230000
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// CHECK4-NEXT: 4213ffc: 21 00 40 f9 ldr x1, [x1]
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// CHECK4-NEXT: 4214000: 04 00 80 14 b 0x6214010
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// CHECK4-NEXT: 4214004: c0 03 5f d6 ret
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.section .text.06, "ax", %progbits
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.space 32 * 1024 * 1024
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// CHECK5: <__CortexA53843419_211000>:
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// CHECK5-NEXT: 6214008: 00 00 40 f9 ldr x0, [x0]
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// CHECK5-NEXT: 621400c: fe f7 7f 16 b 0x212004
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// CHECK5: <__CortexA53843419_4213000>:
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// CHECK5-NEXT: 6214010: 00 00 00 f9 str x0, [x0]
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// CHECK5-NEXT: 6214014: fc ff 7f 17 b 0x4214004
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.section .text.07, "ax", %progbits
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.space (32 * 1024 * 1024) - 12300
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.section .text.08, "ax", %progbits
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.globl need_thunk_after_patch
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.type need_thunk_after_patch, %function
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need_thunk_after_patch:
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ret
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// CHECK6: <need_thunk_after_patch>:
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// CHECK6-NEXT: 821100c: c0 03 5f d6 ret
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// Will need a patch on pass 2
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.section .text.09, "ax", %progbits
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.space 4096 - 20
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.globl t3_ffc_ldr
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.type t3_ffc_ldr, %function
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t3_ffc_ldr:
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adrp x0, dat
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ldr x1, [x1, #0]
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ldr x0, [x0, :got_lo12:dat]
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ret
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// CHECK7: <t3_ffc_ldr>:
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// CHECK7-NEXT: 8211ffc: e0 00 00 f0 adrp x0, 0x8230000
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// CHECK7-NEXT: 8212000: 21 00 40 f9 ldr x1, [x1]
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// CHECK7-NEXT: 8212004: 02 00 00 14 b 0x821200c
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// CHECK7-NEXT: 8212008: c0 03 5f d6 ret
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// CHECK7: <__CortexA53843419_8212004>:
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// CHECK7-NEXT: 821200c: 00 00 40 f9 ldr x0, [x0]
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// CHECK7-NEXT: 8212010: fe ff ff 17 b 0x8212008
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.section .data
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.globl dat
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dat: .quad 0
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