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Disassembler
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[Hexagon] Adding DoubleRegs decoder. Moving C2_mux and A2_nop. Adding combine imm-imm form.
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2014-12-05 18:24:06 +00:00 |
MCTargetDesc
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HexagonMCInst.h: Qualify constants explicitly to appease msc17.
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2014-12-04 00:26:39 +00:00 |
TargetInfo
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Prune redundant dependencies in LLVMBuild.txt.
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2013-12-11 00:30:57 +00:00 |
CMakeLists.txt
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[Hexagon] [NFC] Merging InstPrinter directory in to MCTargetDesc since they have a circular dependency.
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2014-11-20 21:56:35 +00:00 |
Hexagon.h
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Canonicalize header guards into a common format.
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2014-08-13 16:26:38 +00:00 |
Hexagon.td
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[Hexagon] Add new InstrItinClass to support timing classes.
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2014-05-08 18:47:08 +00:00 |
HexagonAsmPrinter.cpp
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[Hexagon] Converting subclass members to an implicit operand.
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2014-12-03 20:23:22 +00:00 |
HexagonAsmPrinter.h
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Canonicalize header guards into a common format.
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2014-08-13 16:26:38 +00:00 |
HexagonCFGOptimizer.cpp
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Remove the TargetMachine forwards for TargetSubtargetInfo based
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2014-08-04 21:25:23 +00:00 |
HexagonCallingConv.td
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…
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HexagonCallingConvLower.cpp
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Remove the TargetMachine forwards for TargetSubtargetInfo based
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2014-08-04 21:25:23 +00:00 |
HexagonCallingConvLower.h
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Canonicalize header guards into a common format.
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2014-08-13 16:26:38 +00:00 |
HexagonCopyToCombine.cpp
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[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
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2014-12-09 20:23:30 +00:00 |
HexagonExpandPredSpillCode.cpp
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[Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings.
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2014-12-09 18:16:49 +00:00 |
HexagonFixupHwLoops.cpp
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[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
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2014-12-09 20:23:30 +00:00 |
HexagonFrameLowering.cpp
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[Hexagon] Removing SUB_rr and replacing with A2_sub.
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2014-11-21 21:19:18 +00:00 |
HexagonFrameLowering.h
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Canonicalize header guards into a common format.
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2014-08-13 16:26:38 +00:00 |
HexagonHardwareLoops.cpp
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[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
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2014-12-09 20:23:30 +00:00 |
HexagonISelDAGToDAG.cpp
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[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
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2014-12-09 20:23:30 +00:00 |
HexagonISelLowering.cpp
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[Hexagon] Adding xtype parity, min, minu, max, maxu instructions.
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2014-12-08 21:19:18 +00:00 |
HexagonISelLowering.h
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[Hexagon] Adding xtype parity, min, minu, max, maxu instructions.
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2014-12-08 21:19:18 +00:00 |
HexagonInstrFormats.td
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[Hexagon] Adding basic disassembler.
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2014-10-22 16:49:14 +00:00 |
HexagonInstrFormatsV4.td
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[Hexagon] Add new InstrItinClass to support timing classes.
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2014-05-08 18:47:08 +00:00 |
HexagonInstrInfo.cpp
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[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
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2014-12-09 20:23:30 +00:00 |
HexagonInstrInfo.h
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Remove unused argument to CreateTargetScheduleState and change
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2014-10-09 01:59:35 +00:00 |
HexagonInstrInfo.td
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[Hexagon] Adding JR class predicated call reg instructions.
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2014-12-10 18:24:16 +00:00 |
HexagonInstrInfoV3.td
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Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.
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2014-11-26 00:46:26 +00:00 |
HexagonInstrInfoV4.td
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[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
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2014-12-09 20:23:30 +00:00 |
HexagonInstrInfoV5.td
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[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
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2014-12-09 20:23:30 +00:00 |
HexagonIntrinsics.td
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Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.
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2014-11-26 00:46:26 +00:00 |
HexagonIntrinsicsDerived.td
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[Hexagon] Adding word combine dot-new form and replacing old combine opcode.
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2014-12-09 19:23:45 +00:00 |
HexagonIntrinsicsV3.td
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…
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HexagonIntrinsicsV4.td
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Add missing attributes !cmp.[eq,gt,gtu] instructions.
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2014-09-25 13:09:54 +00:00 |
HexagonIntrinsicsV5.td
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…
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HexagonMCInstLower.cpp
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[Hexagon] Converting member InstrDesc to static variable.
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2014-12-03 21:40:25 +00:00 |
HexagonMachineFunctionInfo.cpp
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[weak vtables] Remove a bunch of weak vtables
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2013-11-19 00:57:56 +00:00 |
HexagonMachineFunctionInfo.h
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Canonicalize header guards into a common format.
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2014-08-13 16:26:38 +00:00 |
HexagonMachineScheduler.cpp
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Fix null reference creation in ScheduleDAGInstrs constructor call.
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2014-08-20 19:36:05 +00:00 |
HexagonMachineScheduler.h
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Remove unused argument to CreateTargetScheduleState and change
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2014-10-09 01:59:35 +00:00 |
HexagonNewValueJump.cpp
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[Hexagon] Adding cmp* immediate form instructions.
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2014-11-26 19:43:12 +00:00 |
HexagonOperands.td
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…
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HexagonPeephole.cpp
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[Hexagon] Removing old def versions and replacing usages with versions that have encodings.
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2014-12-08 23:55:43 +00:00 |
HexagonRegisterInfo.cpp
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[Hexagon] Converting from ADD_rr to A2_add which has encoding bits.
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2014-11-18 20:28:11 +00:00 |
HexagonRegisterInfo.h
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Canonicalize header guards into a common format.
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2014-08-13 16:26:38 +00:00 |
HexagonRegisterInfo.td
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[Hexagon] Adding JR class predicated call reg instructions.
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2014-12-10 18:24:16 +00:00 |
HexagonRemoveSZExtArgs.cpp
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[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Hexagon edition
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2014-04-29 07:58:16 +00:00 |
HexagonSchedule.td
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[Hexagon] Add new InstrItinClass to support timing classes.
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2014-05-08 18:47:08 +00:00 |
HexagonScheduleV4.td
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[Hexagon] Add new InstrItinClass to support timing classes.
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2014-05-08 18:47:08 +00:00 |
HexagonSelectCCInfo.td
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…
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HexagonSelectionDAGInfo.cpp
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Have HexagonSelectionDAGInfo take a DataLayout rather than a
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2014-06-27 00:18:25 +00:00 |
HexagonSelectionDAGInfo.h
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Canonicalize header guards into a common format.
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2014-08-13 16:26:38 +00:00 |
HexagonSplitConst32AndConst64.cpp
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Remove the TargetMachine forwards for TargetSubtargetInfo based
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2014-08-04 21:25:23 +00:00 |
HexagonSplitTFRCondSets.cpp
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[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
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2014-12-09 20:23:30 +00:00 |
HexagonSubtarget.cpp
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Move all of the hexagon subtarget dependent variables from the target
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2014-06-27 00:27:40 +00:00 |
HexagonSubtarget.h
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Add override to overriden virtual methods, remove virtual keywords.
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2014-09-03 11:41:21 +00:00 |
HexagonTargetMachine.cpp
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Add out of line virtual destructors to all LLVMTargetMachine subclasses
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2014-11-20 23:37:18 +00:00 |
HexagonTargetMachine.h
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Add out of line virtual destructors to all LLVMTargetMachine subclasses
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2014-11-20 23:37:18 +00:00 |
HexagonTargetObjectFile.cpp
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Handle ctor/init_array initialization.
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2014-11-03 14:56:05 +00:00 |
HexagonTargetObjectFile.h
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Canonicalize header guards into a common format.
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2014-08-13 16:26:38 +00:00 |
HexagonVLIWPacketizer.cpp
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Remove the TargetMachine from DFAPacketizer since it was only
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2014-10-14 01:03:16 +00:00 |
HexagonVarargsCallingConvention.h
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Remove the TargetMachine forwards for TargetSubtargetInfo based
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2014-08-04 21:25:23 +00:00 |
LLVMBuild.txt
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[Hexagon] [NFC] Merging InstPrinter directory in to MCTargetDesc since they have a circular dependency.
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2014-11-20 21:56:35 +00:00 |
Makefile
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Update Makefile following directory removal in r222466
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2014-11-20 22:48:24 +00:00 |