llvm-project/llvm/lib/Target/Hexagon
Colin LeMahieu 8872d20788 [Hexagon] Adding JR class predicated call reg instructions.
llvm-svn: 223933
2014-12-10 18:24:16 +00:00
..
Disassembler [Hexagon] Adding DoubleRegs decoder. Moving C2_mux and A2_nop. Adding combine imm-imm form. 2014-12-05 18:24:06 +00:00
MCTargetDesc HexagonMCInst.h: Qualify constants explicitly to appease msc17. 2014-12-04 00:26:39 +00:00
TargetInfo Prune redundant dependencies in LLVMBuild.txt. 2013-12-11 00:30:57 +00:00
CMakeLists.txt [Hexagon] [NFC] Merging InstPrinter directory in to MCTargetDesc since they have a circular dependency. 2014-11-20 21:56:35 +00:00
Hexagon.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
Hexagon.td [Hexagon] Add new InstrItinClass to support timing classes. 2014-05-08 18:47:08 +00:00
HexagonAsmPrinter.cpp [Hexagon] Converting subclass members to an implicit operand. 2014-12-03 20:23:22 +00:00
HexagonAsmPrinter.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
HexagonCFGOptimizer.cpp Remove the TargetMachine forwards for TargetSubtargetInfo based 2014-08-04 21:25:23 +00:00
HexagonCallingConv.td
HexagonCallingConvLower.cpp Remove the TargetMachine forwards for TargetSubtargetInfo based 2014-08-04 21:25:23 +00:00
HexagonCallingConvLower.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
HexagonCopyToCombine.cpp [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. 2014-12-09 20:23:30 +00:00
HexagonExpandPredSpillCode.cpp [Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings. 2014-12-09 18:16:49 +00:00
HexagonFixupHwLoops.cpp [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. 2014-12-09 20:23:30 +00:00
HexagonFrameLowering.cpp [Hexagon] Removing SUB_rr and replacing with A2_sub. 2014-11-21 21:19:18 +00:00
HexagonFrameLowering.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
HexagonHardwareLoops.cpp [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. 2014-12-09 20:23:30 +00:00
HexagonISelDAGToDAG.cpp [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. 2014-12-09 20:23:30 +00:00
HexagonISelLowering.cpp [Hexagon] Adding xtype parity, min, minu, max, maxu instructions. 2014-12-08 21:19:18 +00:00
HexagonISelLowering.h [Hexagon] Adding xtype parity, min, minu, max, maxu instructions. 2014-12-08 21:19:18 +00:00
HexagonInstrFormats.td [Hexagon] Adding basic disassembler. 2014-10-22 16:49:14 +00:00
HexagonInstrFormatsV4.td [Hexagon] Add new InstrItinClass to support timing classes. 2014-05-08 18:47:08 +00:00
HexagonInstrInfo.cpp [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. 2014-12-09 20:23:30 +00:00
HexagonInstrInfo.h Remove unused argument to CreateTargetScheduleState and change 2014-10-09 01:59:35 +00:00
HexagonInstrInfo.td [Hexagon] Adding JR class predicated call reg instructions. 2014-12-10 18:24:16 +00:00
HexagonInstrInfoV3.td Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files. 2014-11-26 00:46:26 +00:00
HexagonInstrInfoV4.td [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. 2014-12-09 20:23:30 +00:00
HexagonInstrInfoV5.td [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. 2014-12-09 20:23:30 +00:00
HexagonIntrinsics.td Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files. 2014-11-26 00:46:26 +00:00
HexagonIntrinsicsDerived.td [Hexagon] Adding word combine dot-new form and replacing old combine opcode. 2014-12-09 19:23:45 +00:00
HexagonIntrinsicsV3.td
HexagonIntrinsicsV4.td Add missing attributes !cmp.[eq,gt,gtu] instructions. 2014-09-25 13:09:54 +00:00
HexagonIntrinsicsV5.td
HexagonMCInstLower.cpp [Hexagon] Converting member InstrDesc to static variable. 2014-12-03 21:40:25 +00:00
HexagonMachineFunctionInfo.cpp [weak vtables] Remove a bunch of weak vtables 2013-11-19 00:57:56 +00:00
HexagonMachineFunctionInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
HexagonMachineScheduler.cpp Fix null reference creation in ScheduleDAGInstrs constructor call. 2014-08-20 19:36:05 +00:00
HexagonMachineScheduler.h Remove unused argument to CreateTargetScheduleState and change 2014-10-09 01:59:35 +00:00
HexagonNewValueJump.cpp [Hexagon] Adding cmp* immediate form instructions. 2014-11-26 19:43:12 +00:00
HexagonOperands.td
HexagonPeephole.cpp [Hexagon] Removing old def versions and replacing usages with versions that have encodings. 2014-12-08 23:55:43 +00:00
HexagonRegisterInfo.cpp [Hexagon] Converting from ADD_rr to A2_add which has encoding bits. 2014-11-18 20:28:11 +00:00
HexagonRegisterInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
HexagonRegisterInfo.td [Hexagon] Adding JR class predicated call reg instructions. 2014-12-10 18:24:16 +00:00
HexagonRemoveSZExtArgs.cpp [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Hexagon edition 2014-04-29 07:58:16 +00:00
HexagonSchedule.td [Hexagon] Add new InstrItinClass to support timing classes. 2014-05-08 18:47:08 +00:00
HexagonScheduleV4.td [Hexagon] Add new InstrItinClass to support timing classes. 2014-05-08 18:47:08 +00:00
HexagonSelectCCInfo.td
HexagonSelectionDAGInfo.cpp Have HexagonSelectionDAGInfo take a DataLayout rather than a 2014-06-27 00:18:25 +00:00
HexagonSelectionDAGInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
HexagonSplitConst32AndConst64.cpp Remove the TargetMachine forwards for TargetSubtargetInfo based 2014-08-04 21:25:23 +00:00
HexagonSplitTFRCondSets.cpp [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. 2014-12-09 20:23:30 +00:00
HexagonSubtarget.cpp Move all of the hexagon subtarget dependent variables from the target 2014-06-27 00:27:40 +00:00
HexagonSubtarget.h Add override to overriden virtual methods, remove virtual keywords. 2014-09-03 11:41:21 +00:00
HexagonTargetMachine.cpp Add out of line virtual destructors to all LLVMTargetMachine subclasses 2014-11-20 23:37:18 +00:00
HexagonTargetMachine.h Add out of line virtual destructors to all LLVMTargetMachine subclasses 2014-11-20 23:37:18 +00:00
HexagonTargetObjectFile.cpp Handle ctor/init_array initialization. 2014-11-03 14:56:05 +00:00
HexagonTargetObjectFile.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
HexagonVLIWPacketizer.cpp Remove the TargetMachine from DFAPacketizer since it was only 2014-10-14 01:03:16 +00:00
HexagonVarargsCallingConvention.h Remove the TargetMachine forwards for TargetSubtargetInfo based 2014-08-04 21:25:23 +00:00
LLVMBuild.txt [Hexagon] [NFC] Merging InstPrinter directory in to MCTargetDesc since they have a circular dependency. 2014-11-20 21:56:35 +00:00
Makefile Update Makefile following directory removal in r222466 2014-11-20 22:48:24 +00:00