forked from OSchip/llvm-project
745 lines
22 KiB
YAML
745 lines
22 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=instruction-select %s -o - | FileCheck -check-prefix=GFX6 %s
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=instruction-select %s -o - | FileCheck -check-prefix=GFX6 %s
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# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select %s -o - | FileCheck -check-prefix=GFX10 %s
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---
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name: test_freeze_s1_vgpr_to_vgpr
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GFX6-LABEL: name: test_freeze_s1_vgpr_to_vgpr
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; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6: $vgpr0 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_s1_vgpr_to_vgpr
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX10: $vgpr0 = COPY [[COPY]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s1) = G_TRUNC %0(s32)
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%2:vgpr(s1) = G_FREEZE %1
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%3:vgpr(s32) = G_ANYEXT %2(s1)
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$vgpr0 = COPY %3(s32)
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...
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---
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name: test_freeze_s1_vgpr_to_agpr
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GFX6-LABEL: name: test_freeze_s1_vgpr_to_agpr
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; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6: $agpr0 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_s1_vgpr_to_agpr
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX10: $agpr0 = COPY [[COPY]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s1) = G_TRUNC %0(s32)
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%2:vgpr(s1) = G_FREEZE %1
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%3:vgpr(s32) = G_ANYEXT %2(s1)
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$agpr0 = COPY %3(s32)
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...
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---
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name: test_freeze_s1_vcc
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GFX6-LABEL: name: test_freeze_s1_vcc
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; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX6: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec
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; GFX6: [[COPY2:%[0-9]+]]:sreg_64_xexec = COPY [[V_CMP_EQ_U32_e64_]]
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; GFX6: S_ENDPGM 0, implicit [[COPY2]]
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; GFX10-LABEL: name: test_freeze_s1_vcc
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX10: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec
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; GFX10: [[COPY2:%[0-9]+]]:sreg_32_xm0_xexec = COPY [[V_CMP_EQ_U32_e64_]]
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; GFX10: S_ENDPGM 0, implicit [[COPY2]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vcc(s1) = G_ICMP intpred(eq), %0(s32), %1
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%3:vcc(s1) = G_FREEZE %2
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S_ENDPGM 0, implicit %3(s1)
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...
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---
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name: test_freeze_s16_vgpr_to_vgpr
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GFX6-LABEL: name: test_freeze_s16_vgpr_to_vgpr
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; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6: $vgpr0 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_s16_vgpr_to_vgpr
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX10: $vgpr0 = COPY [[COPY]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s16) = G_TRUNC %0(s32)
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%2:vgpr(s16) = G_FREEZE %1
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%3:vgpr(s32) = G_ANYEXT %2(s16)
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$vgpr0 = COPY %3(s32)
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...
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---
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name: test_freeze_s32_vgpr_to_vgpr
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GFX6-LABEL: name: test_freeze_s32_vgpr_to_vgpr
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; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6: $vgpr0 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_s32_vgpr_to_vgpr
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX10: $vgpr0 = COPY [[COPY]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = G_FREEZE %0
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$vgpr0 = COPY %1(s32)
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...
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---
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name: test_freeze_s32_sgpr_to_sgpr
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX6-LABEL: name: test_freeze_s32_sgpr_to_sgpr
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; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX6: $sgpr0 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_s32_sgpr_to_sgpr
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX10: $sgpr0 = COPY [[COPY]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_FREEZE %0
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$sgpr0 = COPY %1(s32)
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...
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---
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name: test_freeze_s32_sgpr_to_vgpr
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX6-LABEL: name: test_freeze_s32_sgpr_to_vgpr
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; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX6: $vgpr0 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_s32_sgpr_to_vgpr
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX10: $vgpr0 = COPY [[COPY]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_FREEZE %0
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$vgpr0 = COPY %1(s32)
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...
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---
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name: test_freeze_s32_vgpr_to_agpr
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GFX6-LABEL: name: test_freeze_s32_vgpr_to_agpr
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; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6: $agpr0 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_s32_vgpr_to_agpr
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX10: $agpr0 = COPY [[COPY]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = G_FREEZE %0
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$agpr0 = COPY %1(s32)
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...
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---
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name: test_freeze_s32_sgpr_to_agpr
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX6-LABEL: name: test_freeze_s32_sgpr_to_agpr
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; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX6: $agpr0 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_s32_sgpr_to_agpr
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX10: $agpr0 = COPY [[COPY]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_FREEZE %0
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$agpr0 = COPY %1(s32)
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...
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---
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name: test_freeze_s32_agpr_to_vgpr
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $agpr0
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; GFX6-LABEL: name: test_freeze_s32_agpr_to_vgpr
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; GFX6: [[COPY:%[0-9]+]]:agpr_32 = COPY $agpr0
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; GFX6: $vgpr0 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_s32_agpr_to_vgpr
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:agpr_32 = COPY $agpr0
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; GFX10: $vgpr0 = COPY [[COPY]]
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%0:agpr(s32) = COPY $agpr0
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%1:agpr(s32) = G_FREEZE %0
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$vgpr0 = COPY %1(s32)
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...
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---
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name: test_freeze_s32_agpr_to_agpr
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $agpr0
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; GFX6-LABEL: name: test_freeze_s32_agpr_to_agpr
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; GFX6: [[COPY:%[0-9]+]]:agpr_32 = COPY $agpr0
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; GFX6: $agpr0 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_s32_agpr_to_agpr
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:agpr_32 = COPY $agpr0
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; GFX10: $agpr0 = COPY [[COPY]]
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%0:agpr(s32) = COPY $agpr0
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%1:agpr(s32) = G_FREEZE %0
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$agpr0 = COPY %1(s32)
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...
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---
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name: test_freeze_s64
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GFX6-LABEL: name: test_freeze_s64
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; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX6: $vgpr0_vgpr1 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_s64
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX10: $vgpr0_vgpr1 = COPY [[COPY]]
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%0:vgpr(s64) = COPY $vgpr0_vgpr1
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%1:vgpr(s64) = G_FREEZE %0
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$vgpr0_vgpr1 = COPY %1(s64)
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...
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---
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name: test_freeze_s128
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3
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; GFX6-LABEL: name: test_freeze_s128
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; GFX6: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_s128
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
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%0:vgpr(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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%1:vgpr(s128) = G_FREEZE %0
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1(s128)
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...
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---
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name: test_freeze_256
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
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; GFX6-LABEL: name: test_freeze_256
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; GFX6: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
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; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_256
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
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; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[COPY]]
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%0:vgpr(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
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%1:vgpr(s256) = G_FREEZE %0
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$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1(s256)
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...
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---
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name: test_freeze_s512
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
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; GFX6-LABEL: name: test_freeze_s512
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; GFX6: [[COPY:%[0-9]+]]:vreg_512 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
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; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_s512
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vreg_512 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
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; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[COPY]]
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%0:vgpr(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
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%1:vgpr(s512) = G_FREEZE %0
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$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY %1(s512)
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...
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---
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name: test_freeze_v2s32
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GFX6-LABEL: name: test_freeze_v2s32
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; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX6: $vgpr0_vgpr1 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_v2s32
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX10: $vgpr0_vgpr1 = COPY [[COPY]]
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%0:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
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%1:vgpr(<2 x s32>) = G_FREEZE %0
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$vgpr0_vgpr1 = COPY %1(<2 x s32>)
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...
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---
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name: test_freeze_v3s32
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alignment: 1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2
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; GFX6-LABEL: name: test_freeze_v3s32
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; GFX6: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
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; GFX6: $vgpr0_vgpr1_vgpr2 = COPY [[COPY]]
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; GFX10-LABEL: name: test_freeze_v3s32
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
|
|
; GFX10: $vgpr0_vgpr1_vgpr2 = COPY [[COPY]]
|
|
%0:vgpr(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
|
|
%1:vgpr(<3 x s32>) = G_FREEZE %0
|
|
$vgpr0_vgpr1_vgpr2 = COPY %1(<3 x s32>)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_v4s32
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; GFX6-LABEL: name: test_freeze_v4s32
|
|
; GFX6: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_v4s32
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
|
|
%0:vgpr(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:vgpr(<4 x s32>) = G_FREEZE %0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1(<4 x s32>)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_v5s32
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
|
|
; GFX6-LABEL: name: test_freeze_v5s32
|
|
; GFX6: [[COPY:%[0-9]+]]:vreg_160 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
|
|
; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_v5s32
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_160 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
|
|
; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = COPY [[COPY]]
|
|
%0:vgpr(<5 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
|
|
%1:vgpr(<5 x s32>) = G_FREEZE %0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = COPY %1(<5 x s32>)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_v8s32
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
|
|
; GFX6-LABEL: name: test_freeze_v8s32
|
|
; GFX6: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
|
|
; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_v8s32
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
|
|
; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[COPY]]
|
|
%0:vgpr(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
|
|
%1:vgpr(<8 x s32>) = G_FREEZE %0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1(<8 x s32>)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_v16s32
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
|
|
; GFX6-LABEL: name: test_freeze_v16s32
|
|
; GFX6: [[COPY:%[0-9]+]]:vreg_512 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
|
|
; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_v16s32
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_512 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
|
|
; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[COPY]]
|
|
%0:vgpr(<16 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
|
|
%1:vgpr(<16 x s32>) = G_FREEZE %0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY %1(<16 x s32>)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_v2s16
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0
|
|
; GFX6-LABEL: name: test_freeze_v2s16
|
|
; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX6: $vgpr0 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_v2s16
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX10: $vgpr0 = COPY [[COPY]]
|
|
%0:vgpr(<2 x s16>) = COPY $vgpr0
|
|
%1:vgpr(<2 x s16>) = G_FREEZE %0
|
|
$vgpr0 = COPY %1(<2 x s16>)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_v4s16
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1
|
|
; GFX6-LABEL: name: test_freeze_v4s16
|
|
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; GFX6: $vgpr0_vgpr1 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_v4s16
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; GFX10: $vgpr0_vgpr1 = COPY [[COPY]]
|
|
%0:vgpr(<4 x s16>) = COPY $vgpr0_vgpr1
|
|
%1:vgpr(<4 x s16>) = G_FREEZE %0
|
|
$vgpr0_vgpr1 = COPY %1(<4 x s16>)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_v6s16
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2
|
|
; GFX6-LABEL: name: test_freeze_v6s16
|
|
; GFX6: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
|
|
; GFX6: $vgpr0_vgpr1_vgpr2 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_v6s16
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
|
|
; GFX10: $vgpr0_vgpr1_vgpr2 = COPY [[COPY]]
|
|
%0:vgpr(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2
|
|
%1:vgpr(<6 x s16>) = G_FREEZE %0
|
|
$vgpr0_vgpr1_vgpr2 = COPY %1(<6 x s16>)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_v8s16
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; GFX6-LABEL: name: test_freeze_v8s16
|
|
; GFX6: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_v8s16
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
|
|
%0:vgpr(<8 x s16>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:vgpr(<8 x s16>) = G_FREEZE %0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1(<8 x s16>)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_v2s64
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; GFX6-LABEL: name: test_freeze_v2s64
|
|
; GFX6: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_v2s64
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[COPY]]
|
|
%0:vgpr(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
|
%1:vgpr(<2 x s64>) = G_FREEZE %0
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1(<2 x s64>)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_p0
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1
|
|
; GFX6-LABEL: name: test_freeze_p0
|
|
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; GFX6: $vgpr0_vgpr1 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_p0
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; GFX10: $vgpr0_vgpr1 = COPY [[COPY]]
|
|
%0:vgpr(p0) = COPY $vgpr0_vgpr1
|
|
%1:vgpr(p0) = G_FREEZE %0
|
|
$vgpr0_vgpr1 = COPY %1(p0)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_p1
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1
|
|
; GFX6-LABEL: name: test_freeze_p1
|
|
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; GFX6: $vgpr0_vgpr1 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_p1
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; GFX10: $vgpr0_vgpr1 = COPY [[COPY]]
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
%1:vgpr(p1) = G_FREEZE %0
|
|
$vgpr0_vgpr1 = COPY %1(p1)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_p2
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0
|
|
; GFX6-LABEL: name: test_freeze_p2
|
|
; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX6: $vgpr0 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_p2
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX10: $vgpr0 = COPY [[COPY]]
|
|
%0:vgpr(p2) = COPY $vgpr0
|
|
%1:vgpr(p2) = G_FREEZE %0
|
|
$vgpr0 = COPY %1(p2)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_p3
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0
|
|
; GFX6-LABEL: name: test_freeze_p3
|
|
; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX6: $vgpr0 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_p3
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX10: $vgpr0 = COPY [[COPY]]
|
|
%0:vgpr(p3) = COPY $vgpr0
|
|
%1:vgpr(p3) = G_FREEZE %0
|
|
$vgpr0 = COPY %1(p3)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_p4
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1
|
|
; GFX6-LABEL: name: test_freeze_p4
|
|
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; GFX6: $vgpr0_vgpr1 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_p4
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; GFX10: $vgpr0_vgpr1 = COPY [[COPY]]
|
|
%0:vgpr(p4) = COPY $vgpr0_vgpr1
|
|
%1:vgpr(p4) = G_FREEZE %0
|
|
$vgpr0_vgpr1 = COPY %1(p4)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_p5
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0
|
|
; GFX6-LABEL: name: test_freeze_p5
|
|
; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX6: $vgpr0 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_p5
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX10: $vgpr0 = COPY [[COPY]]
|
|
%0:vgpr(p5) = COPY $vgpr0
|
|
%1:vgpr(p5) = G_FREEZE %0
|
|
$vgpr0 = COPY %1(p5)
|
|
|
|
...
|
|
|
|
---
|
|
name: test_freeze_p999
|
|
alignment: 1
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1
|
|
; GFX6-LABEL: name: test_freeze_p999
|
|
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; GFX6: $vgpr0_vgpr1 = COPY [[COPY]]
|
|
; GFX10-LABEL: name: test_freeze_p999
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; GFX10: $vgpr0_vgpr1 = COPY [[COPY]]
|
|
%0:vgpr(p999) = COPY $vgpr0_vgpr1
|
|
%1:vgpr(p999) = G_FREEZE %0
|
|
$vgpr0_vgpr1 = COPY %1(p999)
|
|
|
|
...
|