forked from OSchip/llvm-project
152 lines
5.5 KiB
C++
152 lines
5.5 KiB
C++
//===- ARM64.cpp ----------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "Arch/ARM64Common.h"
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#include "InputFiles.h"
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#include "Symbols.h"
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#include "SyntheticSections.h"
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#include "Target.h"
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#include "lld/Common/ErrorHandler.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/BinaryFormat/MachO.h"
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#include "llvm/Support/Endian.h"
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#include "llvm/Support/MathExtras.h"
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using namespace llvm;
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using namespace llvm::MachO;
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using namespace llvm::support::endian;
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using namespace lld;
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using namespace lld::macho;
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namespace {
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struct ARM64 : ARM64Common {
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ARM64();
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void writeStub(uint8_t *buf, const Symbol &) const override;
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void writeStubHelperHeader(uint8_t *buf) const override;
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void writeStubHelperEntry(uint8_t *buf, const DylibSymbol &,
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uint64_t entryAddr) const override;
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const RelocAttrs &getRelocAttrs(uint8_t type) const override;
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void populateThunk(InputSection *thunk, Symbol *funcSym) override;
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};
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} // namespace
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// Random notes on reloc types:
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// ADDEND always pairs with BRANCH26, PAGE21, or PAGEOFF12
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// POINTER_TO_GOT: ld64 supports a 4-byte pc-relative form as well as an 8-byte
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// absolute version of this relocation. The semantics of the absolute relocation
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// are weird -- it results in the value of the GOT slot being written, instead
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// of the address. Let's not support it unless we find a real-world use case.
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const RelocAttrs &ARM64::getRelocAttrs(uint8_t type) const {
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static const std::array<RelocAttrs, 11> relocAttrsArray{{
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#define B(x) RelocAttrBits::x
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{"UNSIGNED",
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B(UNSIGNED) | B(ABSOLUTE) | B(EXTERN) | B(LOCAL) | B(BYTE4) | B(BYTE8)},
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{"SUBTRACTOR", B(SUBTRAHEND) | B(EXTERN) | B(BYTE4) | B(BYTE8)},
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{"BRANCH26", B(PCREL) | B(EXTERN) | B(BRANCH) | B(BYTE4)},
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{"PAGE21", B(PCREL) | B(EXTERN) | B(BYTE4)},
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{"PAGEOFF12", B(ABSOLUTE) | B(EXTERN) | B(BYTE4)},
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{"GOT_LOAD_PAGE21", B(PCREL) | B(EXTERN) | B(GOT) | B(BYTE4)},
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{"GOT_LOAD_PAGEOFF12",
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B(ABSOLUTE) | B(EXTERN) | B(GOT) | B(LOAD) | B(BYTE4)},
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{"POINTER_TO_GOT", B(PCREL) | B(EXTERN) | B(GOT) | B(POINTER) | B(BYTE4)},
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{"TLVP_LOAD_PAGE21", B(PCREL) | B(EXTERN) | B(TLV) | B(BYTE4)},
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{"TLVP_LOAD_PAGEOFF12",
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B(ABSOLUTE) | B(EXTERN) | B(TLV) | B(LOAD) | B(BYTE4)},
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{"ADDEND", B(ADDEND)},
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#undef B
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}};
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assert(type < relocAttrsArray.size() && "invalid relocation type");
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if (type >= relocAttrsArray.size())
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return invalidRelocAttrs;
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return relocAttrsArray[type];
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}
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static constexpr uint32_t stubCode[] = {
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0x90000010, // 00: adrp x16, __la_symbol_ptr@page
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0xf9400210, // 04: ldr x16, [x16, __la_symbol_ptr@pageoff]
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0xd61f0200, // 08: br x16
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};
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void ARM64::writeStub(uint8_t *buf8, const Symbol &sym) const {
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::writeStub<LP64>(buf8, stubCode, sym);
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}
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static constexpr uint32_t stubHelperHeaderCode[] = {
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0x90000011, // 00: adrp x17, _dyld_private@page
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0x91000231, // 04: add x17, x17, _dyld_private@pageoff
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0xa9bf47f0, // 08: stp x16/x17, [sp, #-16]!
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0x90000010, // 0c: adrp x16, dyld_stub_binder@page
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0xf9400210, // 10: ldr x16, [x16, dyld_stub_binder@pageoff]
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0xd61f0200, // 14: br x16
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};
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void ARM64::writeStubHelperHeader(uint8_t *buf8) const {
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::writeStubHelperHeader<LP64>(buf8, stubHelperHeaderCode);
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}
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static constexpr uint32_t stubHelperEntryCode[] = {
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0x18000050, // 00: ldr w16, l0
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0x14000000, // 04: b stubHelperHeader
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0x00000000, // 08: l0: .long 0
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};
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void ARM64::writeStubHelperEntry(uint8_t *buf8, const DylibSymbol &sym,
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uint64_t entryVA) const {
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::writeStubHelperEntry(buf8, stubHelperEntryCode, sym, entryVA);
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}
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// A thunk is the relaxed variation of stubCode. We don't need the
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// extra indirection through a lazy pointer because the target address
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// is known at link time.
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static constexpr uint32_t thunkCode[] = {
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0x90000010, // 00: adrp x16, <thunk.ptr>@page
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0x91000210, // 04: add x16, [x16,<thunk.ptr>@pageoff]
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0xd61f0200, // 08: br x16
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};
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void ARM64::populateThunk(InputSection *thunk, Symbol *funcSym) {
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thunk->align = 4;
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thunk->data = {reinterpret_cast<const uint8_t *>(thunkCode),
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sizeof(thunkCode)};
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thunk->relocs.push_back({/*type=*/ARM64_RELOC_PAGEOFF12,
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/*pcrel=*/false, /*length=*/2,
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/*offset=*/4, /*addend=*/0,
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/*referent=*/funcSym});
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thunk->relocs.push_back({/*type=*/ARM64_RELOC_PAGE21,
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/*pcrel=*/true, /*length=*/2,
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/*offset=*/0, /*addend=*/0,
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/*referent=*/funcSym});
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}
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ARM64::ARM64() : ARM64Common(LP64()) {
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cpuType = CPU_TYPE_ARM64;
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cpuSubtype = CPU_SUBTYPE_ARM64_ALL;
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stubSize = sizeof(stubCode);
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thunkSize = sizeof(thunkCode);
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// Branch immediate is two's complement 26 bits, which is implicitly
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// multiplied by 4 (since all functions are 4-aligned: The branch range
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// is -4*(2**(26-1))..4*(2**(26-1) - 1).
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backwardBranchRange = 128 * 1024 * 1024;
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forwardBranchRange = backwardBranchRange - 4;
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stubHelperHeaderSize = sizeof(stubHelperHeaderCode);
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stubHelperEntrySize = sizeof(stubHelperEntryCode);
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}
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TargetInfo *macho::createARM64TargetInfo() {
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static ARM64 t;
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return &t;
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}
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