llvm-project/llvm/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll

19 lines
578 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-- | FileCheck %s
@X = global i32 0 ; <i32*> [#uses=1]
define i32 @_Z3fooi(i32 %x) {
; CHECK-LABEL: _Z3fooi:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %eax, X
; CHECK-NEXT: movsbl %al, %eax
; CHECK-NEXT: retl
entry:
store i32 %x, i32* @X, align 4
%retval67 = trunc i32 %x to i8 ; <i8> [#uses=1]
%retval = sext i8 %retval67 to i32
ret i32 %retval
}