forked from OSchip/llvm-project
88 lines
1.7 KiB
LLVM
88 lines
1.7 KiB
LLVM
; RUN: llc < %s | FileCheck %s
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target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-n8:16"
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target triple = "msp430-elf"
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define zeroext i8 @lshr8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: lshr8:
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; CHECK: clrc
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; CHECK: rrc.b
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%shr = lshr i8 %a, %cnt
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ret i8 %shr
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}
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define signext i8 @ashr8(i8 signext %a, i8 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: ashr8:
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; CHECK: rra.b
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%shr = ashr i8 %a, %cnt
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ret i8 %shr
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}
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define zeroext i8 @shl8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK: shl8
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; CHECK: add.b
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%shl = shl i8 %a, %cnt
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ret i8 %shl
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}
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define zeroext i16 @lshr16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: lshr16:
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; CHECK: clrc
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; CHECK: rrc
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%shr = lshr i16 %a, %cnt
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ret i16 %shr
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}
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define signext i16 @ashr16(i16 signext %a, i16 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: ashr16:
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; CHECK: rra
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%shr = ashr i16 %a, %cnt
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ret i16 %shr
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}
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define zeroext i16 @shl16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: shl16:
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; CHECK: add
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%shl = shl i16 %a, %cnt
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ret i16 %shl
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}
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define i16 @ashr10_i16(i16 %a) #0 {
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entry:
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; CHECK-LABEL: ashr10_i16:
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; CHECK: swpb r12
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; CHECK-NEXT: sxt r12
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; CHECK-NEXT: rra r12
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; CHECK-NEXT: rra r12
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%shr = ashr i16 %a, 10
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ret i16 %shr
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}
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define i16 @lshr10_i16(i16 %a) #0 {
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entry:
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; CHECK-LABEL: lshr10_i16:
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; CHECK: swpb r12
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; CHECK-NEXT: mov.b r12, r12
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; CHECK-NEXT: clrc
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; CHECK-NEXT: rrc r12
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; CHECK-NEXT: rra r12
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%shr = lshr i16 %a, 10
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ret i16 %shr
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}
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define i16 @lshl10_i16(i16 %a) #0 {
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entry:
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; CHECK-LABEL: lshl10_i16:
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; CHECK: mov.b r12, r12
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; CHECK-NEXT: swpb r12
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; CHECK-NEXT: add r12, r12
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; CHECK-NEXT: add r12, r12
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%shl = shl i16 %a, 10
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ret i16 %shl
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}
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