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llvm-project/llvm/test/MC
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Simon Dardis c08af6db5b [mips] Correct jal expansion for local symbols in .local directives. 
This patch corrects the behaviour of code such as:

   .local foo
   jal foo
foo:
to use the correct jal expansion when writing ELF files.

Patch by: Daniel Sanders

Reviewers: zoran.jovanovic, seanbruno, vkalintiris

Differential Revision: https://reviews.llvm.org/D24722

llvm-svn: 287918
 		2016-11-25 11:06:43 +00:00
..
AArch64 [MC][AArch64] Cleanup end-of-line parsing in AArch64 AsmParser. 2016-11-08 18:31:04 +00:00
AMDGPU AMDGPU: Fix formatting of 1/2pi immediate 2016-11-15 00:04:33 +00:00
ARM MC: ensure that we have a section before accessing it 2016-11-22 04:32:54 +00:00
AVR [AVR] Add all of the machine code test suite 2016-11-09 23:46:25 +00:00
AsmParser [MC] Make llvm-mc fail cleanly on invalid output asm variant. 2016-10-31 18:36:31 +00:00
COFF Emit S_COMPILE3 record once per TU rather than once per function 2016-11-02 21:30:35 +00:00
Disassembler [AVX-512] Fix a disassembler failure for AVX-512 vcmpss/vcmpsd with an immediate larger than 32. Fix the same bug with VLX vcmpps/vcmppd. 2016-11-13 19:58:18 +00:00
ELF Reverting back r285355: "Update .debug_line section version information to match DWARF version", while I'm investigating a test failure. 2016-10-27 23:20:19 +00:00
Hexagon [Hexagon] Fix disassembler crash after r279255 2016-09-09 21:45:00 +00:00
Lanai [lanai] Add more tests for assembly of conditional ALU ops 2016-07-11 17:58:16 +00:00
MachO Reverting back r285355: "Update .debug_line section version information to match DWARF version", while I'm investigating a test failure. 2016-10-27 23:20:19 +00:00
Markup
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Mips [mips] Correct jal expansion for local symbols in .local directives. 2016-11-25 11:06:43 +00:00
PowerPC [PPC] add absolute difference altivec instructions and matching intrinsics 2016-10-31 19:47:52 +00:00
Sparc Don't pass a Reloc::Model to MC. 2016-05-18 11:58:50 +00:00
SystemZ [SystemZ] Support CL(G)T instructions 2016-11-11 12:48:26 +00:00
X86 small fixup which enables the issuing of the aforementioned instruction (w/o operands), on MS/Intel syntax. 2016-11-21 15:50:56 +00:00