forked from OSchip/llvm-project
40 lines
1.5 KiB
LLVM
40 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
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@b = external local_unnamed_addr global i32, align 4
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define void @PR33960() {
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; X86-LABEL: PR33960:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl $-1, b
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; X86-NEXT: retl
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;
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; X64-LABEL: PR33960:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl $-1, {{.*}}(%rip)
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; X64-NEXT: retq
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entry:
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%tmp = insertelement <4 x i32> <i32 undef, i32 -7, i32 -3, i32 undef>, i32 -2, i32 3
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%predphi26 = insertelement <4 x i32> %tmp, i32 -7, i32 0
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%tmp1 = trunc <4 x i32> %predphi26 to <4 x i16>
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%tmp2 = icmp eq <4 x i16> %tmp1, zeroinitializer
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%tmp3 = icmp eq <4 x i32> undef, zeroinitializer
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%tmp4 = and <4 x i1> %tmp2, %tmp3
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%predphi17 = select <4 x i1> %tmp4, <4 x i32> undef, <4 x i32> zeroinitializer
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%tmp5 = shl <4 x i32> %predphi17, <i32 16, i32 16, i32 16, i32 16>
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%tmp6 = ashr exact <4 x i32> %tmp5, <i32 16, i32 16, i32 16, i32 16>
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%tmp7 = or <4 x i32> %tmp6, undef
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%tmp8 = or <4 x i32> undef, %tmp7
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%tmp9 = or <4 x i32> undef, %tmp8
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%tmp10 = or <4 x i32> undef, %tmp9
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%tmp11 = or <4 x i32> undef, %tmp10
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%tmp12 = or <4 x i32> undef, %tmp11
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%bin.rdx = or <4 x i32> %tmp12, undef
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%bin.rdx19 = or <4 x i32> %bin.rdx, undef
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%tmp13 = extractelement <4 x i32> %bin.rdx19, i32 0
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%or = or i32 0, %tmp13
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store i32 %or, i32* @b, align 4
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ret void
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}
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