llvm-project/llvm/test/MC/Mips/mips64r6
Simon Dardis 55e446737f [mips] Implement the 'dext' aliases and it's disassembly alias.
The other members of the dext family of instructions (dextm, dextu) are
traditionally handled by the assembler selecting the right variant of
'dext' depending on the values of the position and size operands.

When these instructions are disassembled, rather than reporting the
actual instruction, an equivalent aliased form of 'dext' is generated
and is reported. This is to mimic the behaviour of binutils.

Reviewers: slthakur, nitesh.jain, atanasyan

Differential Revision: https://reviews.llvm.org/D34887

llvm-svn: 313276
2017-09-14 17:27:53 +00:00
..
invalid-mips1-wrong-error.s
invalid-mips1.s
invalid-mips2.s
invalid-mips3-wrong-error.s
invalid-mips3.s
invalid-mips4-wrong-error.s
invalid-mips4.s
invalid-mips5-wrong-error.s
invalid-mips5.s
invalid-mips32-wrong-error.s
invalid-mips64.s
invalid.s [mips] Implement the 'dext' aliases and it's disassembly alias. 2017-09-14 17:27:53 +00:00
relocations.s [mips][microMIPS] add lapc instruction 2017-09-11 18:34:04 +00:00
valid.s [mips] correct operand range for DINSM instruction 2017-09-13 14:09:13 +00:00