forked from OSchip/llvm-project
79 lines
1.6 KiB
ArmAsm
79 lines
1.6 KiB
ArmAsm
# RUN: llvm-mc --triple hexagon -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
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# Hexagon Programmer's Reference Manual 11.2 CR
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# Corner detection acceleration
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# CHECK: 93 e1 12 6b
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p3 = !fastcorner9(p2, p1)
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# CHECK: 91 e3 02 6b
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p1 = fastcorner9(p2, p3)
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# Logical reductions on predicates
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# CHECK: 01 c0 82 6b
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p1 = any8(p2)
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# CHECK: 01 c0 a2 6b
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p1 = all8(p2)
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# Looping instructions
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# CHECK: 00 c0 15 60
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loop0(0, r21)
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# CHECK: 00 c0 35 60
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loop1(0, r21)
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# CHECK: 60 c0 00 69
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loop0(0, #12)
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# CHECK: 60 c0 20 69
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loop1(0, #12)
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# Add to PC
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# CHECK: 91 ca 49 6a
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r17 = add(pc, #21)
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# Pipelined loop instructions
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# CHECK: 00 c0 b5 60
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p3 = sp1loop0(0, r21)
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# CHECK: 00 c0 d5 60
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p3 = sp2loop0(0, r21)
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# CHECK: 00 c0 f5 60
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p3 = sp3loop0(0, r21)
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# CHECK: a1 c0 a0 69
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p3 = sp1loop0(0, #21)
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# CHECK: a1 c0 c0 69
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p3 = sp2loop0(0, #21)
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# CHECK: a1 c0 e0 69
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p3 = sp3loop0(0, #21)
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# Logical operations on predicates
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# CHECK: 01 c3 02 6b
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p1 = and(p3, p2)
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# CHECK: c1 c3 12 6b
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p1 = and(p2, and(p3, p3))
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# CHECK: 01 c3 22 6b
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p1 = or(p3, p2)
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# CHECK: c1 c3 32 6b
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p1 = and(p2, or(p3, p3))
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# CHECK: 01 c3 42 6b
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p1 = xor(p2, p3)
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# CHECK: c1 c3 52 6b
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p1 = or(p2, and(p3, p3))
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# CHECK: 01 c2 63 6b
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p1 = and(p2, !p3)
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# CHECK: c1 c3 72 6b
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p1 = or(p2, or(p3, p3))
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# CHECK: c1 c3 92 6b
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p1 = and(p2, and(p3, !p3))
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# CHECK: c1 c3 b2 6b
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p1 = and(p2, or(p3, !p3))
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# CHECK: 01 c0 c2 6b
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p1 = not(p2)
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# CHECK: c1 c3 d2 6b
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p1 = or(p2, and(p3, !p3))
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# CHECK: 01 c2 e3 6b
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p1 = or(p2, !p3)
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# CHECK: c1 c3 f2 6b
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p1 = or(p2, or(p3, !p3))
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# User control register transfer
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# CHECK: 0d c0 35 62
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cs1 = r21
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# CHECK: 11 c0 0d 6a
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r17 = cs1
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