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llvm-project/llvm/test/CodeGen
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Jinsong Ji 3144d7a2da [PowerPC] P9 Scheduling Model: dispatching rule fixes 
This is to address some of the problems in existing P9 resource modeling,
especially about the dispatching rules.

Instead of using a hypothetical DISPATCHER , we try to use the number of
actual dispatch slots, and define SchedWriteRes to model dispatch rules,
then update instruction classes according to dispatch rules.

All the dispatch rules and instruction classes update are made according
to POWER9 User Manual.

Differential Revision: https://reviews.llvm.org/D61873

llvm-svn: 362509
 		2019-06-04 15:22:23 +00:00
..
AArch64 [NFC][Codegen] D62818 - also add tests with X being constant 2019-06-04 11:44:50 +00:00
AMDGPU AMDGPU: Disable stack realignment for kernels 2019-06-03 21:33:22 +00:00
ARC
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ARM [NFC][Codegen] D62818 - also add tests with X being constant 2019-06-04 11:44:50 +00:00
AVR [AVR] Fix incorrect source regclass of LDWRdPtr 2019-06-03 02:31:07 +00:00
BPF [BPF] generate R_BPF_NONE relocation for BTF DataSec variables 2019-05-26 21:26:06 +00:00
Generic [IR] allow fast-math-flags on select of FP values 2019-05-22 15:50:46 +00:00
Hexagon [NFC] Make tests more robust for new optimizations 2019-05-25 14:10:20 +00:00
Inputs
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Lanai [DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952) 2019-06-04 11:06:21 +00:00
MIR [MIR-Canon] Don't do vreg skip for independent instructions if there are none. 2019-05-31 17:34:25 +00:00
MSP430 [AsmPrinter] refactor to support %c w/ GlobalAddress' 2019-04-26 18:45:04 +00:00
Mips [DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952) 2019-06-04 11:06:21 +00:00
NVPTX SelectionDAG: accommodate atomic floating stores. 2019-05-10 11:23:04 +00:00
PowerPC [PowerPC] P9 Scheduling Model: dispatching rule fixes 2019-06-04 15:22:23 +00:00
RISCV [RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/RISCV 2019-05-23 12:43:13 +00:00
SPARC [DAGCombiner][X86][AArch64][SPARC][SystemZ] y - (x + C) -> (y - x) - C fold. Try 3 2019-05-30 20:37:18 +00:00
SystemZ [NFC] Update the test to check the endianness after the CodeGenPrepare instead of checking the assembly instructions. 2019-06-04 08:45:07 +00:00
Thumb [TargetLowering] Extend bool args to inline-asm according to getBooleanType 2019-05-22 16:16:15 +00:00
Thumb2 [ARM] Replace fp-only-sp and d16 with fp64 and d32. 2019-05-28 16:13:20 +00:00
WebAssembly [WebAssembly] Remove fptosi(undef) and fptoui(undef) from reduced test case. 2019-06-03 16:21:58 +00:00
WinCFGuard
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WinEH
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X86 [SelectionDAG][x86] limit post-legalization store merging by type 2019-06-04 15:15:59 +00:00
XCore [AsmPrinter] refactor to support %c w/ GlobalAddress' 2019-04-26 18:45:04 +00:00