forked from OSchip/llvm-project
66561537f5
sub-register indices and outputs a single super register which is formed from
a consecutive sequence of registers.
This is used as register allocation / coalescing aid and it is useful to
represent instructions that output register pairs / quads. For example,
v1024, v1025 = vload <address>
where v1024 and v1025 forms a register pair.
This really should be modelled as
v1024<3>, v1025<4> = vload <address>
but it would violate SSA property before register allocation is done.
Currently we use insert_subreg to form the super register:
v1026 = implicit_def
v1027 - insert_subreg v1026, v1024, 3
v1028 = insert_subreg v1027, v1025, 4
...
= use v1024
= use v1028
But this adds pseudo live interval overlap between v1024 and v1025.
We can now modeled it as
v1024, v1025 = vload <address>
v1026 = REG_SEQUENCE v1024, 3, v1025, 4
...
= use v1024
= use v1026
After coalescing, it will be
v1026<3>, v1025<4> = vload <address>
...
= use v1026<3>
= use v1026
llvm-svn: 102815
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| .. | ||
| FileCheck | ||
| FileUpdate | ||
| Misc | ||
| PerfectShuffle | ||
| TableGen | ||
| bugpoint | ||
| buildit | ||
| count | ||
| crosstool | ||
| emacs | ||
| fpcmp | ||
| git | ||
| jedit | ||
| lint | ||
| lit | ||
| not | ||
| unittest | ||
| valgrind | ||
| vim | ||
| DSAclean.py | ||
| DSAextract.py | ||
| GenLibDeps.pl | ||
| GetSourceVersion | ||
| Makefile | ||
| NLT.schema | ||
| NewNightlyTest.pl | ||
| NightlyTest.gnuplot | ||
| NightlyTestTemplate.html | ||
| OldenDataRecover.pl | ||
| RegressionFinder.pl | ||
| UpdateCMakeLists.pl | ||
| cgiplotNLT.pl | ||
| check-each-file | ||
| codegen-diff | ||
| countloc.sh | ||
| findmisopt | ||
| findoptdiff | ||
| findsym.pl | ||
| getsrcs.sh | ||
| importNLT.pl | ||
| llvm-native-gcc | ||
| llvm-native-gxx | ||
| llvm.grm | ||
| llvmdo | ||
| llvmgrep | ||
| makellvm | ||
| mkpatch | ||
| parseNLT.pl | ||
| plotNLT.pl | ||
| profile.pl | ||
| userloc.pl | ||
| webNLT.pl | ||