forked from OSchip/llvm-project
167 lines
4.9 KiB
LLVM
167 lines
4.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s -check-prefix=X64
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; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86
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define i32 @foo(i32 %a, i32 %b) local_unnamed_addr #0 {
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; X64-LABEL: foo:
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; X64: # BB#0: # %entry
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; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
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; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
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; X64-NEXT: leal 4(%rdi,%rsi,2), %ecx
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; X64-NEXT: leal 4(%rdi,%rsi,4), %eax
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; X64-NEXT: imull %ecx, %eax
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; X64-NEXT: retq
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;
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; X86-LABEL: foo:
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; X86: # BB#0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: leal 4(%ecx,%eax,2), %edx
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; X86-NEXT: leal 4(%ecx,%eax,4), %eax
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; X86-NEXT: imull %edx, %eax
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; X86-NEXT: retl
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entry:
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%mul = shl i32 %b, 1
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%add = add i32 %a, 4
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%add1 = add i32 %add, %mul
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%mul2 = shl i32 %b, 2
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%add4 = add i32 %add, %mul2
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%mul5 = mul nsw i32 %add1, %add4
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ret i32 %mul5
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}
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define i32 @foo1(i32 %a, i32 %b) local_unnamed_addr #0 {
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; X64-LABEL: foo1:
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; X64: # BB#0: # %entry
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; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
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; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
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; X64-NEXT: leal 4(%rdi,%rsi,4), %ecx
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; X64-NEXT: leal 4(%rdi,%rsi,8), %eax
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; X64-NEXT: imull %ecx, %eax
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; X64-NEXT: retq
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;
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; X86-LABEL: foo1:
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; X86: # BB#0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: leal 4(%ecx,%eax,4), %edx
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; X86-NEXT: leal 4(%ecx,%eax,8), %eax
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; X86-NEXT: imull %edx, %eax
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; X86-NEXT: retl
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entry:
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%mul = shl i32 %b, 2
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%add = add i32 %a, 4
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%add1 = add i32 %add, %mul
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%mul2 = shl i32 %b, 3
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%add4 = add i32 %add, %mul2
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%mul5 = mul nsw i32 %add1, %add4
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ret i32 %mul5
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}
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define i32 @foo1_mult_basic_blocks(i32 %a, i32 %b) local_unnamed_addr #0 {
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; X64-LABEL: foo1_mult_basic_blocks:
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; X64: # BB#0: # %entry
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; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
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; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
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; X64-NEXT: leal 4(%rdi,%rsi,4), %ecx
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: cmpl $10, %ecx
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; X64-NEXT: je .LBB2_2
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; X64-NEXT: # BB#1: # %mid
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; X64-NEXT: leal 4(%rdi,%rsi,8), %eax
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; X64-NEXT: imull %eax, %ecx
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; X64-NEXT: movl %ecx, %eax
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; X64-NEXT: .LBB2_2: # %exit
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; X64-NEXT: retq
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;
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; X86-LABEL: foo1_mult_basic_blocks:
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; X86: # BB#0: # %entry
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; X86-NEXT: pushl %esi
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; X86-NEXT: .Lcfi0:
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: .Lcfi1:
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; X86-NEXT: .cfi_offset %esi, -8
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: leal 4(%esi,%edx,4), %ecx
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: cmpl $10, %ecx
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; X86-NEXT: je .LBB2_2
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; X86-NEXT: # BB#1: # %mid
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; X86-NEXT: leal 4(%esi,%edx,8), %eax
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; X86-NEXT: imull %eax, %ecx
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: .LBB2_2: # %exit
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; X86-NEXT: popl %esi
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; X86-NEXT: retl
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entry:
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%mul = shl i32 %b, 2
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%add = add i32 %a, 4
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%add1 = add i32 %add, %mul
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%cmp = icmp ne i32 %add1 , 10
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br i1 %cmp , label %mid , label %exit
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mid:
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%addn = add i32 %a , 4
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%mul2 = shl i32 %b, 3
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%add4 = add i32 %addn, %mul2
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%mul5 = mul nsw i32 %add1, %add4
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br label %exit
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exit:
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%retmul = phi i32 [%mul5 , %mid] , [0 , %entry]
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ret i32 %retmul
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}
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define i32 @foo1_mult_basic_blocks_illegal_scale(i32 %a, i32 %b) local_unnamed_addr #0 {
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; X64-LABEL: foo1_mult_basic_blocks_illegal_scale:
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; X64: # BB#0: # %entry
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; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
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; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
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; X64-NEXT: leal 4(%rdi,%rsi,2), %ecx
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: cmpl $10, %ecx
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; X64-NEXT: je .LBB3_2
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; X64-NEXT: # BB#1: # %mid
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; X64-NEXT: leal 4(%rdi,%rsi,8), %eax
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; X64-NEXT: imull %eax, %ecx
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; X64-NEXT: movl %ecx, %eax
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; X64-NEXT: .LBB3_2: # %exit
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; X64-NEXT: retq
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;
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; X86-LABEL: foo1_mult_basic_blocks_illegal_scale:
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; X86: # BB#0: # %entry
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; X86-NEXT: pushl %esi
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; X86-NEXT: .Lcfi2:
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: .Lcfi3:
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; X86-NEXT: .cfi_offset %esi, -8
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: leal 4(%esi,%edx,2), %ecx
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: cmpl $10, %ecx
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; X86-NEXT: je .LBB3_2
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; X86-NEXT: # BB#1: # %mid
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; X86-NEXT: leal 4(%esi,%edx,8), %eax
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; X86-NEXT: imull %eax, %ecx
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: .LBB3_2: # %exit
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; X86-NEXT: popl %esi
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; X86-NEXT: retl
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entry:
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%mul = shl i32 %b, 1
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%add = add i32 %a, 4
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%add1 = add i32 %add, %mul
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%cmp = icmp ne i32 %add1 , 10
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br i1 %cmp, label %mid , label %exit
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mid:
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%addn = add i32 %a , 4
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%mul2 = shl i32 %b, 3
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%add4 = add i32 %addn, %mul2
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%mul5 = mul nsw i32 %add1, %add4
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br label %exit
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exit:
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%retmul = phi i32 [%mul5 , %mid] , [0 , %entry]
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ret i32 %retmul
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}
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