Renato Golin 6fb9c2ea70 Do not emit intermediate register for zero FP immediate ... This updates check for double precision zero floating point constant to allow use of instruction with immediate value rather than temporary register. Currently "a == 0.0", where "a" is of "double" type generates: vmov.i32 d16, #0x0 vcmpe.f64 d0, d16 With this change it becomes: vcmpe.f64 d0, #0 Patch by Sergey Dmitrouk. llvm-svn: 220486		2014-10-23 15:31:50 +00:00
..
AArch64	[AArch64] Cleanup A57PBQPConstraints	2014-10-22 12:40:20 +00:00
ARM	Do not emit intermediate register for zero FP immediate	2014-10-23 15:31:50 +00:00
CPP	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Generic	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Hexagon	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Inputs	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
MSP430	Drop the W postfix on the 16-bit registers.	2014-09-10 06:58:14 +00:00
Mips	[mips] Account for endianess when expanding BuildPairF64/ExtractElementF64 nodes.	2014-10-16 15:41:51 +00:00
NVPTX	[MachineSink] Use the real post dominator tree	2014-10-15 03:27:43 +00:00
PowerPC	[PATCH] Support select-cc for VSFRC when VSX is enabled	2014-10-22 16:58:20 +00:00
R600	R600/SI: Add another failing testcase for i1 copies	2014-10-22 05:30:42 +00:00
SPARC	Add back tests for empty function in SPARC and PowerPC.	2014-09-15 22:11:07 +00:00
SystemZ	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Thumb	[Thumb] Fix crash in Thumb1RegisterInfo::rewriteFrameIndex	2014-10-20 11:00:18 +00:00
Thumb2	ARM: Fix a bug which was causing convergence failure in constant-island pass.	2014-10-17 01:31:47 +00:00
X86	Add minnum / maxnum codegen	2014-10-21 23:01:01 +00:00
XCore	Fix a bit of confusion about .set and produce more readable assembly.	2014-10-21 01:17:30 +00:00