forked from OSchip/llvm-project
62 lines
2.0 KiB
LLVM
62 lines
2.0 KiB
LLVM
; RUN: llc -march=hexagon -O3 < %s
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; REQUIRES: asserts
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; Test that we generate the correct names for Phis when there is
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; a Phi that references a Phi that references another Phi. For example,
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; v6 = phi(v1, v9)
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; v7 = phi(v0, v6)
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; v8 = phi(v2, v7)
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; Function Attrs: nounwind
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define void @f0(i8* noalias nocapture readonly %a0, i32 %a1, i32 %a2, i8* noalias nocapture %a3, i32 %a4) #0 {
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b0:
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%v0 = add i32 %a1, -1
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%v1 = getelementptr inbounds i8, i8* %a0, i32 0
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%v2 = getelementptr inbounds i8, i8* %a0, i32 undef
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%v3 = getelementptr inbounds i8, i8* %a3, i32 0
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br i1 undef, label %b1, label %b4
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b1: ; preds = %b1, %b0
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br i1 undef, label %b1, label %b2
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b2: ; preds = %b1
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%v4 = getelementptr inbounds i8, i8* %a0, i32 undef
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br label %b3
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b3: ; preds = %b3, %b2
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%v5 = phi i8* [ %v10, %b3 ], [ %v3, %b2 ]
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%v6 = phi i8* [ %v25, %b3 ], [ %v4, %b2 ]
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%v7 = phi i8* [ %v6, %b3 ], [ %v2, %b2 ]
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%v8 = phi i8* [ %v7, %b3 ], [ %v1, %b2 ]
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%v9 = phi i32 [ %v26, %b3 ], [ 1, %b2 ]
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%v10 = getelementptr inbounds i8, i8* %v5, i32 %a4
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%v11 = getelementptr inbounds i8, i8* %v8, i32 -1
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%v12 = load i8, i8* %v11, align 1, !tbaa !0
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%v13 = zext i8 %v12 to i32
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%v14 = add nuw nsw i32 %v13, 0
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%v15 = add nuw nsw i32 %v14, 0
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%v16 = add nuw nsw i32 %v15, 0
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%v17 = load i8, i8* %v6, align 1, !tbaa !0
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%v18 = zext i8 %v17 to i32
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%v19 = add nuw nsw i32 %v16, %v18
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%v20 = add nuw nsw i32 %v19, 0
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%v21 = mul nsw i32 %v20, 7282
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%v22 = add nsw i32 %v21, 32768
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%v23 = lshr i32 %v22, 16
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%v24 = trunc i32 %v23 to i8
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store i8 %v24, i8* %v10, align 1, !tbaa !0
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%v25 = getelementptr inbounds i8, i8* %v6, i32 %a2
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%v26 = add i32 %v9, 1
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%v27 = icmp eq i32 %v26, %v0
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br i1 %v27, label %b4, label %b3
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b4: ; preds = %b3, %b0
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"omnipotent char", !2, i64 0}
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!2 = !{!"Simple C/C++ TBAA"}
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