forked from OSchip/llvm-project
27 lines
1.1 KiB
C
27 lines
1.1 KiB
C
// RUN: %clang_cc1 -triple armv7s-linux-gnu -target-abi apcs-gnu -emit-llvm -o - %s \
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// RUN: -target-feature +neon -target-cpu cortex-a8 \
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// RUN: -fsanitize=signed-integer-overflow \
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// RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARMV7
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// RUN: %clang_cc1 -triple aarch64-unknown-unknown -emit-llvm -o - %s \
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// RUN: -target-feature +neon -target-cpu cortex-a53 \
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// RUN: -fsanitize=signed-integer-overflow \
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// RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
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// REQUIRES: aarch64-registered-target || arm-registered-target
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// Verify we emit constants for "immediate" builtin arguments.
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// Emitting a scalar expression can make the immediate be generated as
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// overflow intrinsics, if the overflow sanitizer is enabled.
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// PR23517
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#include <arm_neon.h>
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int32x2_t test_vqrshrn_n_s64(int64x2_t a) {
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// CHECK-LABEL: @test_vqrshrn_n_s64
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// CHECK-AARCH64: call <2 x i32> @llvm.aarch64.neon.sqrshrn.v2i32(<2 x i64> {{.*}}, i32 1)
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// CHECK-ARMV7: call <2 x i32> @llvm.arm.neon.vqrshiftns.v2i32(<2 x i64> {{.*}}, <2 x i64> <i64 -1, i64 -1>)
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return vqrshrn_n_s64(a, 0 + 1);
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}
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