forked from OSchip/llvm-project
202 lines
7.7 KiB
C
202 lines
7.7 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
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// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
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// REQUIRES: aarch64-registered-target || arm-registered-target
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#include <arm_mve.h>
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// CHECK-LABEL: @test_veorq_u8(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = xor <16 x i8> [[A:%.*]], [[B:%.*]]
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// CHECK-NEXT: ret <16 x i8> [[TMP0]]
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//
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uint8x16_t test_veorq_u8(uint8x16_t a, uint8x16_t b)
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{
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#ifdef POLYMORPHIC
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return veorq(a, b);
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#else /* POLYMORPHIC */
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return veorq_u8(a, b);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_veorq_s16(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = xor <8 x i16> [[A:%.*]], [[B:%.*]]
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// CHECK-NEXT: ret <8 x i16> [[TMP0]]
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//
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int16x8_t test_veorq_s16(int16x8_t a, int16x8_t b)
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{
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#ifdef POLYMORPHIC
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return veorq(a, b);
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#else /* POLYMORPHIC */
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return veorq_s16(a, b);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_veorq_u32(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = xor <4 x i32> [[A:%.*]], [[B:%.*]]
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// CHECK-NEXT: ret <4 x i32> [[TMP0]]
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//
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uint32x4_t test_veorq_u32(uint32x4_t a, uint32x4_t b)
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{
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#ifdef POLYMORPHIC
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return veorq(a, b);
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#else /* POLYMORPHIC */
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return veorq_u32(a, b);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_veorq_f32(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A:%.*]] to <4 x i32>
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// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x float> [[B:%.*]] to <4 x i32>
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// CHECK-NEXT: [[TMP2:%.*]] = xor <4 x i32> [[TMP0]], [[TMP1]]
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// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[TMP2]] to <4 x float>
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// CHECK-NEXT: ret <4 x float> [[TMP3]]
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//
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float32x4_t test_veorq_f32(float32x4_t a, float32x4_t b)
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{
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#ifdef POLYMORPHIC
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return veorq(a, b);
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#else /* POLYMORPHIC */
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return veorq_f32(a, b);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_veorq_m_s8(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
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// CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
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// CHECK-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.eor.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i1> [[TMP1]], <16 x i8> [[INACTIVE:%.*]])
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// CHECK-NEXT: ret <16 x i8> [[TMP2]]
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//
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int8x16_t test_veorq_m_s8(int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
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{
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#ifdef POLYMORPHIC
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return veorq_m(inactive, a, b, p);
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#else /* POLYMORPHIC */
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return veorq_m_s8(inactive, a, b, p);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_veorq_m_u16(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
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// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
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// CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.eor.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i1> [[TMP1]], <8 x i16> [[INACTIVE:%.*]])
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// CHECK-NEXT: ret <8 x i16> [[TMP2]]
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//
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uint16x8_t test_veorq_m_u16(uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
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{
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#ifdef POLYMORPHIC
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return veorq_m(inactive, a, b, p);
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#else /* POLYMORPHIC */
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return veorq_m_u16(inactive, a, b, p);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_veorq_m_s32(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
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// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
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// CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.eor.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i1> [[TMP1]], <4 x i32> [[INACTIVE:%.*]])
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// CHECK-NEXT: ret <4 x i32> [[TMP2]]
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//
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int32x4_t test_veorq_m_s32(int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
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{
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#ifdef POLYMORPHIC
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return veorq_m(inactive, a, b, p);
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#else /* POLYMORPHIC */
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return veorq_m_s32(inactive, a, b, p);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_veorq_m_f16(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A:%.*]] to <8 x i16>
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// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B:%.*]] to <8 x i16>
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// CHECK-NEXT: [[TMP2:%.*]] = zext i16 [[P:%.*]] to i32
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// CHECK-NEXT: [[TMP3:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP2]])
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// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x half> [[INACTIVE:%.*]] to <8 x i16>
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// CHECK-NEXT: [[TMP5:%.*]] = call <8 x i16> @llvm.arm.mve.eor.predicated.v8i16.v8i1(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]], <8 x i1> [[TMP3]], <8 x i16> [[TMP4]])
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// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i16> [[TMP5]] to <8 x half>
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// CHECK-NEXT: ret <8 x half> [[TMP6]]
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//
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float16x8_t test_veorq_m_f16(float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
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{
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#ifdef POLYMORPHIC
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return veorq_m(inactive, a, b, p);
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#else /* POLYMORPHIC */
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return veorq_m_f16(inactive, a, b, p);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_veorq_x_u8(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
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// CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
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// CHECK-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.eor.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i1> [[TMP1]], <16 x i8> undef)
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// CHECK-NEXT: ret <16 x i8> [[TMP2]]
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//
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uint8x16_t test_veorq_x_u8(uint8x16_t a, uint8x16_t b, mve_pred16_t p)
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{
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#ifdef POLYMORPHIC
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return veorq_x(a, b, p);
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#else /* POLYMORPHIC */
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return veorq_x_u8(a, b, p);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_veorq_x_s16(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
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// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
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// CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.eor.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i1> [[TMP1]], <8 x i16> undef)
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// CHECK-NEXT: ret <8 x i16> [[TMP2]]
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//
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int16x8_t test_veorq_x_s16(int16x8_t a, int16x8_t b, mve_pred16_t p)
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{
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#ifdef POLYMORPHIC
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return veorq_x(a, b, p);
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#else /* POLYMORPHIC */
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return veorq_x_s16(a, b, p);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_veorq_x_u32(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
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// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
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// CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.eor.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i1> [[TMP1]], <4 x i32> undef)
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// CHECK-NEXT: ret <4 x i32> [[TMP2]]
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//
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uint32x4_t test_veorq_x_u32(uint32x4_t a, uint32x4_t b, mve_pred16_t p)
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{
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#ifdef POLYMORPHIC
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return veorq_x(a, b, p);
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#else /* POLYMORPHIC */
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return veorq_x_u32(a, b, p);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_veorq_m_f32(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A:%.*]] to <4 x i32>
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// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x float> [[B:%.*]] to <4 x i32>
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// CHECK-NEXT: [[TMP2:%.*]] = zext i16 [[P:%.*]] to i32
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// CHECK-NEXT: [[TMP3:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP2]])
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// CHECK-NEXT: [[TMP4:%.*]] = call <4 x i32> @llvm.arm.mve.eor.predicated.v4i32.v4i1(<4 x i32> [[TMP0]], <4 x i32> [[TMP1]], <4 x i1> [[TMP3]], <4 x i32> undef)
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// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <4 x float>
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// CHECK-NEXT: ret <4 x float> [[TMP5]]
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//
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float32x4_t test_veorq_m_f32(float32x4_t a, float32x4_t b, mve_pred16_t p)
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{
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#ifdef POLYMORPHIC
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return veorq_x(a, b, p);
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#else /* POLYMORPHIC */
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return veorq_x_f32(a, b, p);
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#endif /* POLYMORPHIC */
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}
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