forked from OSchip/llvm-project
70 lines
2.2 KiB
LLVM
70 lines
2.2 KiB
LLVM
; RUN: llc < %s -march=amdgcn -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC
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; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC
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; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG --check-prefix=FUNC
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; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=EG --check-prefix=FUNC
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; FUNC-LABEL: {{^}}u32_mul24:
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; EG: MUL_UINT24 {{[* ]*}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, KC0[2].W
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; SI: v_mul_u32_u24
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define void @u32_mul24(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = shl i32 %a, 8
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%a_24 = lshr i32 %0, 8
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%1 = shl i32 %b, 8
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%b_24 = lshr i32 %1, 8
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%2 = mul i32 %a_24, %b_24
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store i32 %2, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i16_mul24:
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; EG: MUL_UINT24 {{[* ]*}}T{{[0-9]}}.[[MUL_CHAN:[XYZW]]]
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; The result must be sign-extended
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; EG: BFE_INT {{[* ]*}}T{{[0-9]}}.{{[XYZW]}}, PV.[[MUL_CHAN]], 0.0, literal.x
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; EG: 16
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; SI: v_mul_u32_u24_e{{(32|64)}} [[MUL:v[0-9]]], {{[sv][0-9], [sv][0-9]}}
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; SI: v_bfe_i32 v{{[0-9]}}, [[MUL]], 0, 16
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define void @i16_mul24(i32 addrspace(1)* %out, i16 %a, i16 %b) {
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entry:
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%0 = mul i16 %a, %b
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%1 = sext i16 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i8_mul24:
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; EG: MUL_UINT24 {{[* ]*}}T{{[0-9]}}.[[MUL_CHAN:[XYZW]]]
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; The result must be sign-extended
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; EG: BFE_INT {{[* ]*}}T{{[0-9]}}.{{[XYZW]}}, PV.[[MUL_CHAN]], 0.0, literal.x
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; SI: v_mul_u32_u24_e{{(32|64)}} [[MUL:v[0-9]]], {{[sv][0-9], [sv][0-9]}}
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; SI: v_bfe_i32 v{{[0-9]}}, [[MUL]], 0, 8
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define void @i8_mul24(i32 addrspace(1)* %out, i8 %a, i8 %b) {
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entry:
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%0 = mul i8 %a, %b
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%1 = sext i8 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; Multiply with 24-bit inputs and 64-bit output
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; FUNC_LABEL: {{^}}mul24_i64:
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; EG; MUL_UINT24
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; EG: MULHI
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; FIXME: SI support 24-bit mulhi
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; SI-DAG: v_mul_u32_u24
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; SI-DAG: v_mul_hi_u32
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; SI: s_endpgm
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define void @mul24_i64(i64 addrspace(1)* %out, i64 %a, i64 %b, i64 %c) {
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entry:
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%tmp0 = shl i64 %a, 40
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%a_24 = lshr i64 %tmp0, 40
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%tmp1 = shl i64 %b, 40
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%b_24 = lshr i64 %tmp1, 40
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%tmp2 = mul i64 %a_24, %b_24
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store i64 %tmp2, i64 addrspace(1)* %out
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ret void
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}
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