forked from OSchip/llvm-project
35 lines
1.1 KiB
YAML
35 lines
1.1 KiB
YAML
# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN
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--- |
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define amdgpu_kernel void @inttoptr(i32 addrspace(4)* %const0, i32 addrspace(0)* %flat0) {ret void}
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...
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---
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name: inttoptr
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legalized: true
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regBankSelected: true
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# GCN-LABEL: name: inttoptr
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# GCN: [[S64:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
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# GCN: [[V64:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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# FIXME: This extra copy is unnecessary, but is it the instruction selector's
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# job to clean this up?
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# GCN: [[S64_COPY:%[0-9]+]]:sreg_64 = COPY [[S64]]
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# GCN: [[VAL:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[S64_COPY]], 0, 0
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# GCN: [[V_VAL:%[0-9]+]]:vgpr_32 = COPY [[VAL]]
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# GCN: FLAT_STORE_DWORD [[V64]], [[V_VAL]]
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#
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $vgpr0_vgpr1
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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%1:vgpr(s64) = COPY $vgpr0_vgpr1
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%2:sgpr(p4) = G_INTTOPTR %0
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%3:sgpr(s32) = G_LOAD %2 :: (load 4 from %ir.const0)
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%4:vgpr(p0) = G_INTTOPTR %1
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%5:vgpr(s32) = COPY %3
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G_STORE %5, %4 :: (store 4 into %ir.flat0)
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...
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---
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