forked from OSchip/llvm-project
584a70c820
Adds code generation support for dcbtst (data cache prefetch for write) and icbt (instruction cache prefetch for read - Book E cores only). We still end up with a 'cannot select' error for the non-supported prefetch intrinsic forms. This will be fixed in a later commit. Fixes PR20692. llvm-svn: 216339 |
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Sparc | ||
SystemZ | ||
X86 | ||
XCore |