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AsmParser
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AArch64: support .cpu directive
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2016-04-02 19:29:52 +00:00 |
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Disassembler
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Remove autoconf support
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2016-01-26 21:29:08 +00:00 |
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InstPrinter
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Remove autoconf support
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2016-01-26 21:29:08 +00:00 |
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MCTargetDesc
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[AArch64] Better errors for out-of-range fixups
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2016-04-01 09:14:50 +00:00 |
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TargetInfo
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Remove autoconf support
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2016-01-26 21:29:08 +00:00 |
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Utils
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Remove autoconf support
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2016-01-26 21:29:08 +00:00 |
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AArch64.h
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AArch64: avoid clobbering SP for dead MOVimm pseudos.
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2016-04-01 23:14:52 +00:00 |
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AArch64.td
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AArch64: remove CRC feature from Cyclone.
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2016-02-24 18:10:17 +00:00 |
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AArch64A53Fix835769.cpp
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Add MachineFunctionProperty checks for AllVRegsAllocated for target passes
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2016-04-04 17:09:25 +00:00 |
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AArch64A57FPLoadBalancing.cpp
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RegisterScavenger: Take a reference as enterBasicBlock() argument.
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2016-04-06 02:47:09 +00:00 |
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AArch64AddressTypePromotion.cpp
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Simplify some boolean conditional return statements in AArch64.
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2016-02-29 22:50:49 +00:00 |
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AArch64AdvSIMDScalarPass.cpp
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AArch64: Remove implicit ilist iterator conversions, NFC
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2015-10-13 20:02:15 +00:00 |
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AArch64AsmPrinter.cpp
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Clean up redundant copies of Triple objects. NFC
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2015-06-16 15:44:21 +00:00 |
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AArch64BranchRelaxation.cpp
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[AArch64] Fix typo. NFC.
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2016-03-25 14:37:43 +00:00 |
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AArch64CallLowering.cpp
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[AArch64] gcc does not like litteral without quotes even on preprocessor macros.
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2016-04-07 20:49:15 +00:00 |
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AArch64CallLowering.h
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[GlobalISel] Re-apply r260922-260923 with MSVC-friendly code.
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2016-02-16 19:26:02 +00:00 |
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AArch64CallingConvention.h
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Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef.
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2015-12-05 07:13:35 +00:00 |
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AArch64CallingConvention.td
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AArch64: Use a callee save registers for swiftself parameters
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2016-04-13 21:43:16 +00:00 |
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AArch64CleanupLocalDynamicTLSPass.cpp
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Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC"
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2016-02-22 20:49:58 +00:00 |
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AArch64CollectLOH.cpp
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Add MachineFunctionProperty checks for AllVRegsAllocated for target passes
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2016-04-04 17:09:25 +00:00 |
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AArch64ConditionOptimizer.cpp
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Fix AArch64ConditionOptimizer
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2016-01-15 00:06:58 +00:00 |
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AArch64ConditionalCompares.cpp
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WIP: CodeGen: Use MachineInstr& in MachineInstrBundle.h, NFC
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2016-02-27 17:05:33 +00:00 |
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AArch64DeadRegisterDefinitionsPass.cpp
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AArch64: don't create instructions that write to xzr/wzr twice.
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2016-04-13 16:25:39 +00:00 |
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AArch64ExpandPseudoInsts.cpp
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AArch64: avoid clobbering SP for dead MOVimm pseudos.
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2016-04-01 23:14:52 +00:00 |
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AArch64FastISel.cpp
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Swift Calling Convention: swifterror target support.
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2016-04-11 21:08:06 +00:00 |
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AArch64FrameLowering.cpp
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AArch64: Use a callee save registers for swiftself parameters
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2016-04-13 21:43:16 +00:00 |
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AArch64FrameLowering.h
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Change eliminateCallFramePseudoInstr() to return an iterator
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2016-03-31 18:33:38 +00:00 |
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AArch64GISelAccessor.h
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[AArch64] Teach the subtarget how to get to the RegisterBankInfo.
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2016-04-06 17:26:03 +00:00 |
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AArch64ISelDAGToDAG.cpp
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NFC: make AtomicOrdering an enum class
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2016-04-06 21:19:33 +00:00 |
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AArch64ISelLowering.cpp
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TargetLowering: Factor out common code for tail call eligibility checking; NFC
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2016-04-14 01:10:42 +00:00 |
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AArch64ISelLowering.h
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Swift Calling Convention: swifterror target support.
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2016-04-11 21:08:06 +00:00 |
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AArch64InstrAtomics.td
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NFC: make AtomicOrdering an enum class
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2016-04-06 21:19:33 +00:00 |
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AArch64InstrFormats.td
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AArch64: Add missing schedinfo, check completeness for cyclone
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2016-03-01 21:20:31 +00:00 |
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AArch64InstrInfo.cpp
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[AArch64] Disable LDP/STP for quads
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2016-04-13 18:31:45 +00:00 |
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AArch64InstrInfo.h
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[AArch64][CodeGen] NFC refactor AArch64InstrInfo::optimizeCompareInstr to prepare it for fixing a bug in it
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2016-04-06 11:39:00 +00:00 |
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AArch64InstrInfo.td
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AArch64: remove pseudo-instructions used only for their patterns.
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2016-03-10 18:46:12 +00:00 |
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AArch64LoadStoreOptimizer.cpp
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Add MachineFunctionProperty checks for AllVRegsAllocated for target passes
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2016-04-04 17:09:25 +00:00 |
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AArch64MCInstLower.cpp
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Convert some AArch64 code to foreach loops. NFC.
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2015-08-03 19:04:32 +00:00 |
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AArch64MCInstLower.h
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Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
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2015-06-23 09:49:53 +00:00 |
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AArch64MachineFunctionInfo.h
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[AArch64] Break the dependency between FP and SP when possible.
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2016-03-14 18:17:41 +00:00 |
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AArch64PBQPRegAlloc.cpp
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CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC
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2016-02-27 06:40:41 +00:00 |
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AArch64PBQPRegAlloc.h
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Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
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2015-06-23 09:49:53 +00:00 |
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AArch64PerfectShuffle.h
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…
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AArch64PromoteConstant.cpp
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Fix -Wdocumentation warnings from r263853
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2016-03-21 22:13:44 +00:00 |
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AArch64RedundantCopyElimination.cpp
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Add MachineFunctionProperty checks for AllVRegsAllocated for target passes
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2016-04-04 17:09:25 +00:00 |
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AArch64RegisterBankInfo.cpp
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[AArch64] Fix a typo in the register class to register bank mapping.
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2016-04-07 23:10:14 +00:00 |
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AArch64RegisterBankInfo.h
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[AArch64] Teach RegisterBankInfo about the CC register bank.
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2016-04-07 00:39:29 +00:00 |
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AArch64RegisterInfo.cpp
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Swift Calling Convention: swifterror target support.
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2016-04-11 21:08:06 +00:00 |
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AArch64RegisterInfo.h
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CXX_FAST_TLS calling convention: performance improvement for AArch64.
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2015-12-16 21:04:19 +00:00 |
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AArch64RegisterInfo.td
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[AArch64] Add ARMv8.2-A FP16 vector instructions
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2015-12-08 12:16:10 +00:00 |
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AArch64SchedA53.td
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AArch64: Reenable CompleteModel for A53, A57 and Kryo models
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2016-03-01 21:55:35 +00:00 |
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AArch64SchedA57.td
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AArch64: Reenable CompleteModel for A53, A57 and Kryo models
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2016-03-01 21:55:35 +00:00 |
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AArch64SchedA57WriteRes.td
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…
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AArch64SchedCyclone.td
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AArch64: Add missing schedinfo, check completeness for cyclone
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2016-03-01 21:20:31 +00:00 |
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AArch64SchedKryo.td
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AArch64: Reenable CompleteModel for A53, A57 and Kryo models
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2016-03-01 21:55:35 +00:00 |
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AArch64SchedKryoDetails.td
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[AArch64] Add support for Qualcomm Kryo CPU.
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2016-02-12 15:51:51 +00:00 |
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AArch64SchedM1.td
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[AArch64] Fuse AES{D,E}/AESMC for Exynos M1. (NFC)
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2016-04-12 22:42:36 +00:00 |
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AArch64Schedule.td
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AArch64: Add missing schedinfo, check completeness for cyclone
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2016-03-01 21:20:31 +00:00 |
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AArch64SelectionDAGInfo.cpp
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Remove getDataLayout() from TargetSelectionDAGInfo (had no users)
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2015-07-09 02:10:08 +00:00 |
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AArch64SelectionDAGInfo.h
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Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/
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2016-01-27 16:32:26 +00:00 |
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AArch64StorePairSuppress.cpp
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[TII] Allow getMemOpBaseRegImmOfs() to accept negative offsets. NFC.
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2016-03-09 16:00:35 +00:00 |
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AArch64Subtarget.cpp
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[AArch64] Teach the subtarget how to get to the RegisterBankInfo.
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2016-04-06 17:26:03 +00:00 |
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AArch64Subtarget.h
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[AArch64] Teach the subtarget how to get to the RegisterBankInfo.
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2016-04-06 17:26:03 +00:00 |
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AArch64TargetMachine.cpp
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[AArch64] Get rid of some GlobalISel ifdefs.
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2016-04-07 21:24:40 +00:00 |
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AArch64TargetMachine.h
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Replace string GNU Triples with llvm::Triple in TargetMachine. NFC.
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2015-06-11 19:41:26 +00:00 |
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AArch64TargetObjectFile.cpp
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MC: Clean up MCExpr naming. NFC.
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2015-05-30 01:25:56 +00:00 |
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AArch64TargetObjectFile.h
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[AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents
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2015-03-06 13:49:05 +00:00 |
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AArch64TargetTransformInfo.cpp
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[LoopDataPrefetch] Centralize the tuning cl::opts under the pass
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2016-03-29 23:45:52 +00:00 |
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AArch64TargetTransformInfo.h
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[LoopDataPrefetch] Add TTI to limit the number of iterations to prefetch ahead
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2016-03-18 00:27:43 +00:00 |
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CMakeLists.txt
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[AArch64][CallLowering] Do not build the API if GlobalISel is not built.
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2016-04-07 20:47:51 +00:00 |
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LLVMBuild.txt
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[AArch64] Plug the beginning of the GlobalISel pipeline.
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2016-02-11 19:35:06 +00:00 |
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