..
AsmParser
[AMDGPU][MC] Improved errors handling for v_interp* operands
2020-12-28 16:15:48 +03:00
Disassembler
[AMDGPU] Clarify scratch initialization
2020-12-15 20:14:20 +00:00
MCTargetDesc
[AMDGPU] Clarify scratch initialization
2020-12-15 20:14:20 +00:00
TargetInfo
llvmbuildectomy - replace llvm-build by plain cmake
2020-11-13 10:35:24 +01:00
Utils
[AMDGPU] Unify flat offset logic
2020-12-15 14:59:59 +01:00
AMDGPU.h
[NewPM][AMDGPU] Pass TargetMachine to AMDGPUSimplifyLibCallsPass
2021-01-04 13:48:09 -08:00
AMDGPU.td
[AMDGPU] Remove deprecated V_MUL_LO_I32 from GFX10
2021-01-05 11:59:57 -05:00
AMDGPUAliasAnalysis.cpp
[NewPM][AMDGPU] Make amdgpu-aa work with NewPM
2021-01-04 12:36:27 -08:00
AMDGPUAliasAnalysis.h
[NewPM][AMDGPU] Make amdgpu-aa work with NewPM
2021-01-04 12:36:27 -08:00
AMDGPUAlwaysInlinePass.cpp
[NewPM][AMDGPU] Port amdgpu-always-inline
2021-01-04 12:27:01 -08:00
AMDGPUAnnotateKernelFeatures.cpp
AMDGPU: Annotate functions that have stack objects
2020-05-19 18:51:00 -04:00
AMDGPUAnnotateUniformValues.cpp
AMDGPU: Annotate amdgpu.noclobber for global loads only
2021-01-05 14:47:19 -08:00
AMDGPUArgumentUsageInfo.cpp
AMDGPU/GlobalISel: Add types to special inputs
2020-07-06 17:00:55 -04:00
AMDGPUArgumentUsageInfo.h
AMDGPU: Use MCRegister for preloaded arguments
2020-07-20 13:34:28 -04:00
AMDGPUAsmPrinter.cpp
[AMDGPU] Print SCRATCH_EN field after the kernel
2020-12-15 22:44:30 -08:00
AMDGPUAsmPrinter.h
[AMDGPU] Emit stack frame size in metadata
2020-11-25 16:30:02 +01:00
AMDGPUAtomicOptimizer.cpp
[AMDGPU] Do not generate mul with 1 in AMDGPU Atomic Optimizer
2020-09-30 11:09:18 +02:00
AMDGPUCallLowering.cpp
AMDGPU/GlobalISel: Start cleaning up calling convention lowering
2021-01-07 10:36:45 -05:00
AMDGPUCallLowering.h
AMDGPU/GlobalISel: Start cleaning up calling convention lowering
2021-01-07 10:36:45 -05:00
AMDGPUCallingConv.td
AMDGPU: Remove redundant CCAction for i1
2020-12-15 17:00:27 -05:00
AMDGPUCodeGenPrepare.cpp
SelectionDAG.h - remove unnecessary FunctionLoweringInfo.h include. NFCI.
2020-09-03 18:33:25 +01:00
AMDGPUCombine.td
AMDGPU/GlobalISel: Use same builder/observer in post-legalizer-combiner
2020-11-03 09:24:50 +01:00
AMDGPUExportClustering.cpp
[AMDGPU] Fix scheduling of exp pos4
2020-11-12 19:57:14 +00:00
AMDGPUExportClustering.h
[AMDGPU] Cluster shader exports
2020-05-07 19:05:38 +09:00
AMDGPUFeatures.td
AMDGPU: Change internal tracking of wave size
2020-06-01 17:55:08 -04:00
AMDGPUFixFunctionBitcasts.cpp
AMDGPU.h - reduce TargetMachine.h include. NFC.
2020-05-24 15:27:41 +01:00
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUGISel.td
[AMDGPU][GlobalISel] GlobalISel for flat scratch
2020-12-22 16:33:06 -08:00
AMDGPUGenRegisterBankInfo.def
AMDGPU/GlobalISel: Fix missing 256-bit AGPR mapping
2020-08-17 09:53:26 -04:00
AMDGPUGlobalISelUtils.cpp
[AMDGPU] Remove an unused return value. NFC.
2020-11-10 09:15:14 +00:00
AMDGPUGlobalISelUtils.h
[AMDGPU] Remove an unused return value. NFC.
2020-11-10 09:15:14 +00:00
AMDGPUHSAMetadataStreamer.cpp
AMDGPU: Start interpreting byref on kernel arguments
2020-07-21 18:11:22 -04:00
AMDGPUHSAMetadataStreamer.h
AMDGPU: Start interpreting byref on kernel arguments
2020-07-21 18:11:22 -04:00
AMDGPUISelDAGToDAG.cpp
[AMDGPU] Unify flat offset logic
2020-12-15 14:59:59 +01:00
AMDGPUISelLowering.cpp
[AMDGPU] Mark amdgpu_gfx functions as module entry function
2020-12-14 10:43:39 +01:00
AMDGPUISelLowering.h
[AMDGPU] Some refactoring after D90404. NFC.
2020-11-01 13:18:53 +05:30
AMDGPUInline.cpp
[NFC] Remove unused GetUnderlyingObject paramenter
2020-07-31 02:10:03 -07:00
AMDGPUInstCombineIntrinsic.cpp
[Target] Construct SmallVector with iterator ranges (NFC)
2021-01-03 09:57:45 -08:00
AMDGPUInstrInfo.cpp
…
AMDGPUInstrInfo.h
[AMDGPU] Use tablegen for argument indices
2020-10-05 11:50:52 +02:00
AMDGPUInstrInfo.td
AMDGPU: Remove intermediate DAG node for trig_preop intrinsic
2020-06-16 21:06:25 -04:00
AMDGPUInstructionSelector.cpp
[AMDGPU][GlobalISel] Fold flat vgpr + constant addresses
2020-12-23 10:40:30 +01:00
AMDGPUInstructionSelector.h
[AMDGPU][GlobalISel] GlobalISel for flat scratch
2020-12-22 16:33:06 -08:00
AMDGPUInstructions.td
[TableGen] Add the !filter bang operator.
2020-11-09 10:56:55 -05:00
AMDGPULateCodeGenPrepare.cpp
[amdgpu] Add the late codegen preparation pass.
2020-10-27 14:07:59 -04:00
AMDGPULegalizerInfo.cpp
AMDGPU/GlobalISel: Update fdiv lowering for denormal/ulp interaction
2021-01-06 12:32:01 -05:00
AMDGPULegalizerInfo.h
[AMDGPU] Implement hardware bug workaround for image instructions
2020-10-07 07:39:52 -04:00
AMDGPULibCalls.cpp
[NewPM][AMDGPU] Pass TargetMachine to AMDGPUSimplifyLibCallsPass
2021-01-04 13:48:09 -08:00
AMDGPULibFunc.cpp
[SVE] Eliminate calls to default-false VectorType::get() from AMDGPU
2020-05-29 17:54:17 -07:00
AMDGPULibFunc.h
AMDGPULibFunc - fix include order. NFC.
2020-05-24 13:25:59 +01:00
AMDGPULowerIntrinsics.cpp
AMDGPU: Use caller subtarget, not intrinsic declaration
2020-08-27 16:42:09 -04:00
AMDGPULowerKernelArguments.cpp
clang-format, address warnings
2020-12-30 23:05:07 +09:00
AMDGPULowerKernelAttributes.cpp
[NewPM][AMDGPU] Port amdgpu-lower-kernel-attributes
2020-12-29 10:26:06 -08:00
AMDGPUMCInstLower.cpp
AMDGPU: Increase branch size estimate with offset bug
2020-10-23 10:34:24 -04:00
AMDGPUMachineCFGStructurizer.cpp
[AMDGPU] Apply llvm-prefer-register-over-unsigned from clang-tidy
2020-08-21 10:14:35 +01:00
AMDGPUMachineFunction.cpp
[AMDGPU] Mark amdgpu_gfx functions as module entry function
2020-12-14 10:43:39 +01:00
AMDGPUMachineFunction.h
[AMDGPU] Mark amdgpu_gfx functions as module entry function
2020-12-14 10:43:39 +01:00
AMDGPUMachineModuleInfo.cpp
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AMDGPUMachineModuleInfo.h
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AMDGPUMacroFusion.cpp
[AMDGPU] Extend macro fusion for ADDC and SUBB to SUBBREV
2020-03-11 17:59:21 +00:00
AMDGPUMacroFusion.h
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
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AMDGPUPTNote.h
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AMDGPUPerfHintAnalysis.cpp
AMDGPU.h - reduce TargetMachine.h include. NFC.
2020-05-24 15:27:41 +01:00
AMDGPUPerfHintAnalysis.h
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AMDGPUPostLegalizerCombiner.cpp
AMDGPU/GlobalISel: Use same builder/observer in post-legalizer-combiner
2020-11-03 09:24:50 +01:00
AMDGPUPreLegalizerCombiner.cpp
AMDGPU/GlobalISel: Mark GlobalISel classes as final
2020-07-28 11:42:17 -04:00
AMDGPUPrintfRuntimeBinding.cpp
[NewPM][AMDGPU] Port amdgpu-printf-runtime-binding
2021-01-04 12:25:50 -08:00
AMDGPUPromoteAlloca.cpp
[AMDGPU][NewPM] Port amdgpu-promote-alloca(-to-vector)
2020-12-28 17:52:31 -08:00
AMDGPUPropagateAttributes.cpp
[NewPM][AMDGPU] Port amdgpu-propagate-attributes-early/late
2021-01-04 11:53:37 -08:00
AMDGPURegBankCombiner.cpp
AMDGPU/GlobalISel: Mark GlobalISel classes as final
2020-07-28 11:42:17 -04:00
AMDGPURegisterBankInfo.cpp
GlobalISel: Return APInt from getConstantVRegVal
2020-12-22 22:23:58 -05:00
AMDGPURegisterBankInfo.h
AMDGPU/GlobalISel: Start trying to handle AGPR bank
2020-08-06 12:39:50 -04:00
AMDGPURegisterBanks.td
AMDGPU/GlobalISel: Add SReg_96 to SGPRRegBank
2020-07-28 16:49:55 -04:00
AMDGPURewriteOutArguments.cpp
Use unary CreateShuffleVector if possible
2020-12-30 22:36:08 +09:00
AMDGPUSearchableTables.td
AMDGPU: Define raw/struct variants of buffer atomic fadd
2020-08-06 13:36:19 -04:00
AMDGPUSubtarget.cpp
[AMDGPU] Use MUBUF instructions for global address space access
2020-12-24 10:13:04 +00:00
AMDGPUSubtarget.h
[AMDGPU] Use MUBUF instructions for global address space access
2020-12-24 10:13:04 +00:00
AMDGPUTargetMachine.cpp
[NFC] Rename registerAliasAnalyses -> registerDefaultAliasAnalyses
2021-01-05 11:07:58 -08:00
AMDGPUTargetMachine.h
[NFC] Rename registerAliasAnalyses -> registerDefaultAliasAnalyses
2021-01-05 11:07:58 -08:00
AMDGPUTargetObjectFile.cpp
…
AMDGPUTargetObjectFile.h
AMDGPUTargetObjectFile.h - remove unnecessary includes. NFC.
2020-05-24 13:57:02 +01:00
AMDGPUTargetTransformInfo.cpp
[SLP] Control maximum vectorization factor from TTI
2020-12-14 08:49:40 -08:00
AMDGPUTargetTransformInfo.h
[SLP] Control maximum vectorization factor from TTI
2020-12-14 08:49:40 -08:00
AMDGPUUnifyDivergentExitNodes.cpp
[Target] Use llvm::append_range (NFC)
2021-01-03 09:57:43 -08:00
AMDGPUUnifyMetadata.cpp
[NewPM][AMDGPU] Port amdgpu-unify-metadata
2021-01-04 11:57:46 -08:00
AMDILCFGStructurizer.cpp
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AMDKernelCodeT.h
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BUFInstructions.td
[AMDGPU] Add default 1 glc operand to rtn atomics
2020-11-05 10:41:59 -08:00
CMakeLists.txt
[NewPM][AMDGPU] Port amdgpu-simplifylib/amdgpu-usenative
2020-12-28 10:38:51 -08:00
CaymanInstructions.td
[AMDGPU] Fix and simplify AMDGPUTargetLowering::LowerUDIVREM
2020-07-08 19:14:49 +01:00
DSInstructions.td
[AMDGPU] Resolve issues when picking between ds_read/write and ds_read2/write2
2020-12-10 12:40:49 +01:00
EXPInstructions.td
[AMDGPU] Separate out real exp instructions by subtarget. NFC.
2020-11-11 17:13:40 +00:00
EvergreenInstructions.td
[AMDGPU] Omit needless string concatenations. NFC.
2020-10-28 12:56:52 +00:00
FLATInstructions.td
[AMDGPU] Allow no saddr for global addtid insts
2020-12-16 10:01:40 +01:00
GCNDPPCombine.cpp
AMDGPU: Rename add/sub with carry out instructions
2020-07-16 13:16:30 -04:00
GCNHazardRecognizer.cpp
[AMDGPU] Rename pseudo S_WAITCNT_IDLE to S_WAIT_IDLE. NFC.
2020-11-18 14:03:43 +00:00
GCNHazardRecognizer.h
[AMDGPU] Add Reset function to GCNHazardRecognizer
2020-10-28 16:32:32 -07:00
GCNILPSched.cpp
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GCNIterativeScheduler.cpp
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GCNIterativeScheduler.h
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GCNMinRegStrategy.cpp
Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"
2020-09-21 13:33:05 +02:00
GCNNSAReassign.cpp
[AMDGPU] Use llvm::is_contained (NFC)
2020-12-04 21:42:55 -08:00
GCNProcessors.td
[AMDGPU] Add gfx1033 target
2020-11-03 16:27:48 +00:00
GCNRegBankReassign.cpp
[AMDGPU] Resolve pseudo registers at encoding uses
2020-11-04 12:52:32 -05:00
GCNRegPressure.cpp
[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
2020-08-20 17:59:11 +01:00
GCNRegPressure.h
[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
2020-08-20 17:59:11 +01:00
GCNSchedStrategy.cpp
[AMDGPU] Fix not rescheduling without clustering
2020-08-07 11:15:58 -07:00
GCNSchedStrategy.h
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InstCombineTables.td
[InstCombine] Move target-specific inst combining
2020-07-22 15:59:49 +02:00
MIMGInstructions.td
[TableGen] Eliminate the 'code' type
2020-12-03 10:19:11 -05:00
R600.td
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R600AsmPrinter.cpp
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R600AsmPrinter.h
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R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
[AMDGPU] Make use of divideCeil. NFC.
2020-03-26 16:11:35 +00:00
R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600FrameLowering.cpp
[SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference.
2020-11-05 11:02:18 +00:00
R600FrameLowering.h
[SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference.
2020-11-05 11:02:18 +00:00
R600ISelLowering.cpp
[SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference.
2020-11-05 11:02:18 +00:00
R600ISelLowering.h
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R600InstrFormats.td
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R600InstrInfo.cpp
[SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference.
2020-11-05 11:02:18 +00:00
R600InstrInfo.h
Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicate
2020-10-21 11:52:47 +01:00
R600Instructions.td
[NFC] Remove unused GetUnderlyingObject paramenter
2020-07-31 02:10:03 -07:00
R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
[Target] Use llvm::append_range (NFC)
2021-01-03 09:57:43 -08:00
R600MachineScheduler.h
[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
2020-08-20 17:59:11 +01:00
R600OpenCLImageTypeLoweringPass.cpp
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R600OptimizeVectorRegisters.cpp
AMDGPU: Use Register
2020-06-30 12:13:08 -04:00
R600Packetizer.cpp
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R600Processors.td
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R600RegisterInfo.cpp
[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
2020-08-20 17:59:11 +01:00
R600RegisterInfo.h
[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
2020-08-20 17:59:11 +01:00
R600RegisterInfo.td
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R600Schedule.td
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R700Instructions.td
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SIAddIMGInit.cpp
[AMDGPU] gfx1030 RT support
2020-09-16 11:40:58 -07:00
SIAnnotateControlFlow.cpp
[AMDGPU] Split edge to make si_if dominate end_cf
2020-12-28 17:14:02 +03:00
SIDefines.h
[AMDGPU] Add a TRANS bit to TSFlags. NFC.
2020-11-24 17:49:56 +00:00
SIFixSGPRCopies.cpp
[Target] Construct SmallVector with iterator ranges (NFC)
2021-01-03 09:57:45 -08:00
SIFixVGPRCopies.cpp
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SIFoldOperands.cpp
[AMDGPU] Handle v_fmac_legacy_f32 in SIFoldOperands
2021-01-05 11:55:33 +00:00
SIFormMemoryClauses.cpp
[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
2020-08-20 17:59:11 +01:00
SIFrameLowering.cpp
[AMDGPU] Implement flat scratch init for pal
2020-11-20 11:14:30 +01:00
SIFrameLowering.h
[SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference.
2020-11-05 11:02:18 +00:00
SIISelLowering.cpp
[Target] Construct SmallVector with iterator ranges (NFC)
2021-01-03 09:57:45 -08:00
SIISelLowering.h
[AMDGPU] Implement hardware bug workaround for image instructions
2020-10-07 07:39:52 -04:00
SIInsertHardClauses.cpp
[AMDGPU/MemOpsCluster] Let mem ops clustering logic also consider number of clustered bytes
2020-06-01 22:52:34 +05:30
SIInsertSkips.cpp
[AMDGPU] Use llvm::is_contained (NFC)
2020-12-04 21:42:55 -08:00
SIInsertWaitcnts.cpp
[AMDGPU] Fix and extend vccz workarounds
2020-11-18 15:26:06 +00:00
SIInstrFormats.td
[AMDGPU] Add a TRANS bit to TSFlags. NFC.
2020-11-24 17:49:56 +00:00
SIInstrInfo.cpp
[NFC] Reduce include files dependency and AA header cleanup (part 2).
2020-12-17 14:04:48 +03:00
SIInstrInfo.h
[AMDGPU] Folding of FI operand with flat scratch
2020-12-22 10:48:04 -08:00
SIInstrInfo.td
[AMDGPU] Folding of FI operand with flat scratch
2020-12-22 10:48:04 -08:00
SIInstructions.td
[AMDGPU] Add new pseudos for indirect addressing with VGPR Indexing
2020-12-08 12:24:12 -08:00
SILoadStoreOptimizer.cpp
[AMDGPU] gfx1030 RT support
2020-09-16 11:40:58 -07:00
SILowerControlFlow.cpp
[Target] Construct SmallVector with iterator ranges (NFC)
2021-01-03 09:57:45 -08:00
SILowerI1Copies.cpp
[AMDGPU] Use llvm::is_contained (NFC)
2020-12-04 21:42:55 -08:00
SILowerSGPRSpills.cpp
AMDGPU: Use Register
2020-12-22 21:55:59 -05:00
SIMachineFunctionInfo.cpp
[AMDGPU] Omit buffer resource with flat scratch.
2020-11-09 08:05:20 -08:00
SIMachineFunctionInfo.h
[amdgpu] Add codegen support for HIP dynamic shared memory.
2020-08-20 21:29:18 -04:00
SIMachineScheduler.cpp
[Target] Use llvm::append_range (NFC)
2021-01-03 09:57:43 -08:00
SIMachineScheduler.h
Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"
2020-09-21 13:33:05 +02:00
SIMemoryLegalizer.cpp
[AMDGPU] Add new pseudos for indirect addressing with VGPR Indexing
2020-12-08 12:24:12 -08:00
SIModeRegister.cpp
[AMDGPU] Enable scheduling around FP MODE-setting instructions
2020-09-16 16:10:47 +01:00
SIOptimizeExecMasking.cpp
[AMDGPU] Fix lowering of S_MOV_{B32,B64}_term
2020-11-10 12:16:31 +09:00
SIOptimizeExecMaskingPreRA.cpp
[NFC] Use Register/MCRegister
2020-11-04 12:20:17 -08:00
SIPeepholeSDWA.cpp
[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
2020-08-20 17:59:11 +01:00
SIPostRABundler.cpp
AMDGPU: Do not bundle inline asm
2020-06-14 13:24:50 -04:00
SIPreAllocateWWMRegs.cpp
AMDGPU: Reorder checks
2020-11-02 10:21:48 -05:00
SIPreEmitPeephole.cpp
[AMDGPU] Fix missed SI_RETURN_TO_EPILOG in pre-emit peephole
2020-08-13 21:52:41 +09:00
SIProgramInfo.cpp
[AMDGPU] Set rsrc1 flags for graphics shaders
2020-11-04 12:25:41 +01:00
SIProgramInfo.h
[AMDGPU] Set rsrc1 flags for graphics shaders
2020-11-04 12:25:41 +01:00
SIRegisterInfo.cpp
[AMDGPU] Folding of FI operand with flat scratch
2020-12-22 10:48:04 -08:00
SIRegisterInfo.h
[AMDGPU] Implement flat scratch init for pal
2020-11-20 11:14:30 +01:00
SIRegisterInfo.td
[TableGen] Add the !filter bang operator.
2020-11-09 10:56:55 -05:00
SIRemoveShortExecBranches.cpp
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SISchedule.td
[AMDGPU] Add XDL resource to scheduling model
2020-09-14 13:48:54 -07:00
SIShrinkInstructions.cpp
[AMDGPU] Fix VC warning about singed/unsigned comparison. NFC.
2020-10-26 11:55:57 -07:00
SIWholeQuadMode.cpp
[NFC] Use [MC]Register
2020-11-09 08:37:14 -08:00
SMInstructions.td
[AMDGPU] Make use of HasSMemRealTime predicate. NFC.
2020-12-14 16:34:57 +00:00
SOPInstructions.td
[AMDGPU] Rename pseudo S_WAITCNT_IDLE to S_WAIT_IDLE. NFC.
2020-11-18 14:03:43 +00:00
VIInstrFormats.td
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VOP1Instructions.td
[AMDGPU] Add a TRANS bit to TSFlags. NFC.
2020-11-24 17:49:56 +00:00
VOP2Instructions.td
[AMDGPU] Fix double space in disassembly of SDWA instructions with vcc
2020-10-28 21:39:39 +00:00
VOP3Instructions.td
[AMDGPU] Remove deprecated V_MUL_LO_I32 from GFX10
2021-01-05 11:59:57 -05:00
VOP3PInstructions.td
[AMDGPU][NFC] Rename opsel/opsel_hi/neg_lo/neg_hi with suffix 0
2020-12-14 20:01:56 +09:00
VOPCInstructions.td
[AMDGPU] Corrected declaration of VOPC instructions with SDWA addressing mode.
2020-11-05 11:15:50 -05:00
VOPInstructions.td
[AMDGPU] Add a TRANS bit to TSFlags. NFC.
2020-11-24 17:49:56 +00:00
6b7d5a928f