forked from OSchip/llvm-project
6f2a526101
Rename to allowsMisalignedMemoryAccess. On R600, 8 and 16 byte accesses are mostly OK with 4-byte alignment, and don't need to be split into multiple accesses. Vector loads with an alignment of the element type are not uncommon in OpenCL code. llvm-svn: 214055 |
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.. | ||
Disassembler | ||
InstPrinter | ||
MCTargetDesc | ||
TargetInfo | ||
CMakeLists.txt | ||
LLVMBuild.txt | ||
Makefile | ||
README.txt | ||
XCore.h | ||
XCore.td | ||
XCoreAsmPrinter.cpp | ||
XCoreCallingConv.td | ||
XCoreFrameLowering.cpp | ||
XCoreFrameLowering.h | ||
XCoreFrameToArgsOffsetElim.cpp | ||
XCoreISelDAGToDAG.cpp | ||
XCoreISelLowering.cpp | ||
XCoreISelLowering.h | ||
XCoreInstrFormats.td | ||
XCoreInstrInfo.cpp | ||
XCoreInstrInfo.h | ||
XCoreInstrInfo.td | ||
XCoreLowerThreadLocal.cpp | ||
XCoreMCInstLower.cpp | ||
XCoreMCInstLower.h | ||
XCoreMachineFunctionInfo.cpp | ||
XCoreMachineFunctionInfo.h | ||
XCoreRegisterInfo.cpp | ||
XCoreRegisterInfo.h | ||
XCoreRegisterInfo.td | ||
XCoreSelectionDAGInfo.cpp | ||
XCoreSelectionDAGInfo.h | ||
XCoreSubtarget.cpp | ||
XCoreSubtarget.h | ||
XCoreTargetMachine.cpp | ||
XCoreTargetMachine.h | ||
XCoreTargetObjectFile.cpp | ||
XCoreTargetObjectFile.h | ||
XCoreTargetStreamer.h | ||
XCoreTargetTransformInfo.cpp |
README.txt
To-do ----- * Instruction encodings * Tailcalls * Investigate loop alignment * Add builtins