forked from OSchip/llvm-project
302 lines
10 KiB
C
302 lines
10 KiB
C
/*===---- cpuid.h - X86 cpu model detection --------------------------------===
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===-----------------------------------------------------------------------===
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*/
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#if !(__x86_64__ || __i386__)
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#error this header is for x86 only
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#endif
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/* Responses identification request with %eax 0 */
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/* AMD: "AuthenticAMD" */
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#define signature_AMD_ebx 0x68747541
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#define signature_AMD_edx 0x69746e65
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#define signature_AMD_ecx 0x444d4163
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/* CENTAUR: "CentaurHauls" */
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#define signature_CENTAUR_ebx 0x746e6543
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#define signature_CENTAUR_edx 0x48727561
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#define signature_CENTAUR_ecx 0x736c7561
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/* CYRIX: "CyrixInstead" */
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#define signature_CYRIX_ebx 0x69727943
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#define signature_CYRIX_edx 0x736e4978
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#define signature_CYRIX_ecx 0x64616574
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/* INTEL: "GenuineIntel" */
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#define signature_INTEL_ebx 0x756e6547
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#define signature_INTEL_edx 0x49656e69
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#define signature_INTEL_ecx 0x6c65746e
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/* TM1: "TransmetaCPU" */
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#define signature_TM1_ebx 0x6e617254
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#define signature_TM1_edx 0x74656d73
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#define signature_TM1_ecx 0x55504361
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/* TM2: "GenuineTMx86" */
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#define signature_TM2_ebx 0x756e6547
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#define signature_TM2_edx 0x54656e69
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#define signature_TM2_ecx 0x3638784d
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/* NSC: "Geode by NSC" */
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#define signature_NSC_ebx 0x646f6547
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#define signature_NSC_edx 0x43534e20
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#define signature_NSC_ecx 0x79622065
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/* NEXGEN: "NexGenDriven" */
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#define signature_NEXGEN_ebx 0x4778654e
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#define signature_NEXGEN_edx 0x72446e65
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#define signature_NEXGEN_ecx 0x6e657669
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/* RISE: "RiseRiseRise" */
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#define signature_RISE_ebx 0x65736952
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#define signature_RISE_edx 0x65736952
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#define signature_RISE_ecx 0x65736952
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/* SIS: "SiS SiS SiS " */
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#define signature_SIS_ebx 0x20536953
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#define signature_SIS_edx 0x20536953
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#define signature_SIS_ecx 0x20536953
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/* UMC: "UMC UMC UMC " */
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#define signature_UMC_ebx 0x20434d55
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#define signature_UMC_edx 0x20434d55
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#define signature_UMC_ecx 0x20434d55
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/* VIA: "VIA VIA VIA " */
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#define signature_VIA_ebx 0x20414956
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#define signature_VIA_edx 0x20414956
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#define signature_VIA_ecx 0x20414956
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/* VORTEX: "Vortex86 SoC" */
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#define signature_VORTEX_ebx 0x74726f56
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#define signature_VORTEX_edx 0x36387865
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#define signature_VORTEX_ecx 0x436f5320
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/* Features in %ecx for leaf 1 */
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#define bit_SSE3 0x00000001
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#define bit_PCLMULQDQ 0x00000002
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#define bit_PCLMUL bit_PCLMULQDQ /* for gcc compat */
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#define bit_DTES64 0x00000004
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#define bit_MONITOR 0x00000008
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#define bit_DSCPL 0x00000010
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#define bit_VMX 0x00000020
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#define bit_SMX 0x00000040
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#define bit_EIST 0x00000080
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#define bit_TM2 0x00000100
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#define bit_SSSE3 0x00000200
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#define bit_CNXTID 0x00000400
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#define bit_FMA 0x00001000
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#define bit_CMPXCHG16B 0x00002000
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#define bit_xTPR 0x00004000
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#define bit_PDCM 0x00008000
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#define bit_PCID 0x00020000
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#define bit_DCA 0x00040000
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#define bit_SSE41 0x00080000
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#define bit_SSE4_1 bit_SSE41 /* for gcc compat */
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#define bit_SSE42 0x00100000
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#define bit_SSE4_2 bit_SSE42 /* for gcc compat */
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#define bit_x2APIC 0x00200000
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#define bit_MOVBE 0x00400000
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#define bit_POPCNT 0x00800000
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#define bit_TSCDeadline 0x01000000
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#define bit_AESNI 0x02000000
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#define bit_AES bit_AESNI /* for gcc compat */
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#define bit_XSAVE 0x04000000
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#define bit_OSXSAVE 0x08000000
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#define bit_AVX 0x10000000
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#define bit_F16C 0x20000000
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#define bit_RDRND 0x40000000
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/* Features in %edx for leaf 1 */
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#define bit_FPU 0x00000001
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#define bit_VME 0x00000002
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#define bit_DE 0x00000004
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#define bit_PSE 0x00000008
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#define bit_TSC 0x00000010
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#define bit_MSR 0x00000020
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#define bit_PAE 0x00000040
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#define bit_MCE 0x00000080
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#define bit_CX8 0x00000100
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#define bit_CMPXCHG8B bit_CX8 /* for gcc compat */
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#define bit_APIC 0x00000200
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#define bit_SEP 0x00000800
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#define bit_MTRR 0x00001000
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#define bit_PGE 0x00002000
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#define bit_MCA 0x00004000
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#define bit_CMOV 0x00008000
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#define bit_PAT 0x00010000
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#define bit_PSE36 0x00020000
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#define bit_PSN 0x00040000
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#define bit_CLFSH 0x00080000
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#define bit_DS 0x00200000
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#define bit_ACPI 0x00400000
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#define bit_MMX 0x00800000
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#define bit_FXSR 0x01000000
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#define bit_FXSAVE bit_FXSR /* for gcc compat */
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#define bit_SSE 0x02000000
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#define bit_SSE2 0x04000000
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#define bit_SS 0x08000000
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#define bit_HTT 0x10000000
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#define bit_TM 0x20000000
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#define bit_PBE 0x80000000
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/* Features in %ebx for leaf 7 sub-leaf 0 */
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#define bit_FSGSBASE 0x00000001
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#define bit_SGX 0x00000004
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#define bit_BMI 0x00000008
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#define bit_HLE 0x00000010
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#define bit_AVX2 0x00000020
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#define bit_SMEP 0x00000080
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#define bit_BMI2 0x00000100
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#define bit_ENH_MOVSB 0x00000200
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#define bit_INVPCID 0x00000400
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#define bit_RTM 0x00000800
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#define bit_MPX 0x00004000
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#define bit_AVX512F 0x00010000
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#define bit_AVX512DQ 0x00020000
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#define bit_RDSEED 0x00040000
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#define bit_ADX 0x00080000
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#define bit_AVX512IFMA 0x00200000
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#define bit_CLFLUSHOPT 0x00800000
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#define bit_CLWB 0x01000000
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#define bit_AVX512PF 0x04000000
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#define bit_AVX512ER 0x08000000
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#define bit_AVX512CD 0x10000000
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#define bit_SHA 0x20000000
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#define bit_AVX512BW 0x40000000
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#define bit_AVX512VL 0x80000000
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/* Features in %ecx for leaf 7 sub-leaf 0 */
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#define bit_PREFTCHWT1 0x00000001
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#define bit_AVX512VBMI 0x00000002
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#define bit_PKU 0x00000004
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#define bit_OSPKE 0x00000010
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#define bit_WAITPKG 0x00000020
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#define bit_AVX512VBMI2 0x00000040
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#define bit_SHSTK 0x00000080
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#define bit_GFNI 0x00000100
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#define bit_VAES 0x00000200
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#define bit_VPCLMULQDQ 0x00000400
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#define bit_AVX512VNNI 0x00000800
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#define bit_AVX512BITALG 0x00001000
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#define bit_AVX512VPOPCNTDQ 0x00004000
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#define bit_RDPID 0x00400000
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#define bit_CLDEMOTE 0x02000000
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#define bit_MOVDIRI 0x08000000
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#define bit_MOVDIR64B 0x10000000
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/* Features in %edx for leaf 7 sub-leaf 0 */
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#define bit_AVX5124VNNIW 0x00000004
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#define bit_AVX5124FMAPS 0x00000008
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#define bit_PCONFIG 0x00040000
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#define bit_IBT 0x00100000
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/* Features in %eax for leaf 7 sub-leaf 1 */
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#define bit_AVX512BF16 0x00000020
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/* Features in %eax for leaf 13 sub-leaf 1 */
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#define bit_XSAVEOPT 0x00000001
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#define bit_XSAVEC 0x00000002
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#define bit_XSAVES 0x00000008
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/* Features in %eax for leaf 0x14 sub-leaf 0 */
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#define bit_PTWRITE 0x00000010
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/* Features in %ecx for leaf 0x80000001 */
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#define bit_LAHF_LM 0x00000001
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#define bit_ABM 0x00000020
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#define bit_LZCNT bit_ABM /* for gcc compat */
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#define bit_SSE4a 0x00000040
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#define bit_PRFCHW 0x00000100
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#define bit_XOP 0x00000800
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#define bit_LWP 0x00008000
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#define bit_FMA4 0x00010000
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#define bit_TBM 0x00200000
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#define bit_MWAITX 0x20000000
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/* Features in %edx for leaf 0x80000001 */
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#define bit_MMXEXT 0x00400000
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#define bit_LM 0x20000000
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#define bit_3DNOWP 0x40000000
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#define bit_3DNOW 0x80000000
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/* Features in %ebx for leaf 0x80000008 */
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#define bit_CLZERO 0x00000001
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#define bit_WBNOINVD 0x00000200
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#if __i386__
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#define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \
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__asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \
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: "0"(__leaf))
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#define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \
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__asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \
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: "0"(__leaf), "2"(__count))
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#else
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/* x86-64 uses %rbx as the base register, so preserve it. */
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#define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \
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__asm(" xchgq %%rbx,%q1\n" \
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" cpuid\n" \
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" xchgq %%rbx,%q1" \
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: "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \
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: "0"(__leaf))
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#define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \
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__asm(" xchgq %%rbx,%q1\n" \
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" cpuid\n" \
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" xchgq %%rbx,%q1" \
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: "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \
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: "0"(__leaf), "2"(__count))
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#endif
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static __inline int __get_cpuid_max (unsigned int __leaf, unsigned int *__sig)
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{
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unsigned int __eax, __ebx, __ecx, __edx;
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#if __i386__
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int __cpuid_supported;
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__asm(" pushfl\n"
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" popl %%eax\n"
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" movl %%eax,%%ecx\n"
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" xorl $0x00200000,%%eax\n"
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" pushl %%eax\n"
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" popfl\n"
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" pushfl\n"
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" popl %%eax\n"
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" movl $0,%0\n"
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" cmpl %%eax,%%ecx\n"
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" je 1f\n"
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" movl $1,%0\n"
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"1:"
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: "=r" (__cpuid_supported) : : "eax", "ecx");
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if (!__cpuid_supported)
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return 0;
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#endif
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__cpuid(__leaf, __eax, __ebx, __ecx, __edx);
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if (__sig)
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*__sig = __ebx;
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return __eax;
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}
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static __inline int __get_cpuid (unsigned int __leaf, unsigned int *__eax,
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unsigned int *__ebx, unsigned int *__ecx,
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unsigned int *__edx)
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{
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unsigned int __max_leaf = __get_cpuid_max(__leaf & 0x80000000, 0);
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if (__max_leaf == 0 || __max_leaf < __leaf)
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return 0;
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__cpuid(__leaf, *__eax, *__ebx, *__ecx, *__edx);
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return 1;
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}
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static __inline int __get_cpuid_count (unsigned int __leaf,
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unsigned int __subleaf,
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unsigned int *__eax, unsigned int *__ebx,
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unsigned int *__ecx, unsigned int *__edx)
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{
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unsigned int __max_leaf = __get_cpuid_max(__leaf & 0x80000000, 0);
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if (__max_leaf == 0 || __max_leaf < __leaf)
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return 0;
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__cpuid_count(__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx);
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return 1;
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}
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