llvm-project/llvm/lib/Target/SystemZ
Benjamin Kramer 2a8bef8769 Do a sweep over move ctors and remove those that are identical to the default.
All of these existed because MSVC 2013 was unable to synthesize default
move ctors. We recently dropped support for it so all that error-prone
boilerplate can go.

No functionality change intended.

llvm-svn: 284721
2016-10-20 12:20:28 +00:00
..
AsmParser Revert r283690, "MC: Remove unused entities." 2016-10-10 22:49:37 +00:00
Disassembler Move the global variables representing each Target behind accessor function 2016-10-09 23:00:34 +00:00
InstPrinter [SystemZ] Add support for the .insn directive 2016-08-08 15:13:08 +00:00
MCTargetDesc Move the global variables representing each Target behind accessor function 2016-10-09 23:00:34 +00:00
TargetInfo Move the global variables representing each Target behind accessor function 2016-10-09 23:00:34 +00:00
CMakeLists.txt [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
LLVMBuild.txt
README.txt [SystemZ] Utilize Test Data Class instructions. 2016-07-10 14:41:22 +00:00
SystemZ.h [SystemZ] Utilize Test Data Class instructions. 2016-07-10 14:41:22 +00:00
SystemZ.td [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZAsmPrinter.cpp Move the global variables representing each Target behind accessor function 2016-10-09 23:00:34 +00:00
SystemZAsmPrinter.h Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
SystemZCallingConv.cpp [SystemZ] Fix ABI for i128 argument and return types 2016-02-19 14:10:21 +00:00
SystemZCallingConv.h [SystemZ] Fix ABI for i128 argument and return types 2016-02-19 14:10:21 +00:00
SystemZCallingConv.td [SystemZ] Support Swift Calling Convention 2016-04-28 00:17:23 +00:00
SystemZConstantPoolValue.cpp Drop prelink support. 2015-11-17 00:51:23 +00:00
SystemZConstantPoolValue.h Drop prelink support. 2015-11-17 00:51:23 +00:00
SystemZElimCompare.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
SystemZFrameLowering.cpp MachineFunction: Return reference for getFrameInfo(); NFC 2016-07-28 18:40:00 +00:00
SystemZFrameLowering.h Change eliminateCallFramePseudoInstr() to return an iterator 2016-03-31 18:33:38 +00:00
SystemZHazardRecognizer.cpp [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZHazardRecognizer.h [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZISelDAGToDAG.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
SystemZISelLowering.cpp [MachineMemOperand] Move synchronization scope and atomic orderings from SDNode to MachineMemOperand, and remove redundant getAtomic* member functions from SelectionDAG. 2016-10-15 22:01:18 +00:00
SystemZISelLowering.h getVectorElementType().getSizeInBits() -> getScalarSizeInBits() ; NFCI 2016-09-14 16:37:15 +00:00
SystemZInstrBuilder.h MachineFunction: Return reference for getFrameInfo(); NFC 2016-07-28 18:40:00 +00:00
SystemZInstrFP.td [SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround 2016-08-18 20:08:15 +00:00
SystemZInstrFormats.td [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZInstrInfo.cpp [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZInstrInfo.h [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZInstrInfo.td [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZInstrVector.td [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZLDCleanup.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
SystemZLongBranch.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
SystemZMCInstLower.cpp
SystemZMCInstLower.h
SystemZMachineFunctionInfo.cpp
SystemZMachineFunctionInfo.h [SystemZ] Support llvm.frameaddress/llvm.returnaddress intrinsics 2016-04-04 12:44:55 +00:00
SystemZMachineScheduler.cpp [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZMachineScheduler.h [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZOperands.td [SystemZ] Add support for the .insn directive 2016-08-08 15:13:08 +00:00
SystemZOperators.td Target: Remove unused patterns and transforms. NFC. 2016-10-07 00:30:49 +00:00
SystemZPatterns.td
SystemZProcessors.td [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZRegisterInfo.cpp [SystemZ] Support Swift Calling Convention 2016-04-28 00:17:23 +00:00
SystemZRegisterInfo.h [SystemZ] [SSP] Add support for LOAD_STACK_GUARD. 2016-04-24 13:57:49 +00:00
SystemZRegisterInfo.td [SystemZ] Add support for the .insn directive 2016-08-08 15:13:08 +00:00
SystemZSchedule.td [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZScheduleZ13.td [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZScheduleZ196.td [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZScheduleZEC12.td [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZSelectionDAGInfo.cpp [SelectionDAG] Get rid of bool parameters in SelectionDAG::getLoad, getStore, and friends. 2016-07-15 18:27:10 +00:00
SystemZSelectionDAGInfo.h Pass DebugLoc and SDLoc by const ref. 2016-06-12 15:39:02 +00:00
SystemZShortenInst.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
SystemZSubtarget.cpp [SystemZ] Recognize Load On Condition Immediate (LOCHI/LOGHI) opportunities 2016-07-11 18:45:03 +00:00
SystemZSubtarget.h [SystemZ] Recognize Load On Condition Immediate (LOCHI/LOGHI) opportunities 2016-07-11 18:45:03 +00:00
SystemZTDC.cpp [SystemZ] Utilize Test Data Class instructions. 2016-07-10 14:41:22 +00:00
SystemZTargetMachine.cpp [SystemZ] Post-RA scheduler implementation 2016-10-20 08:27:16 +00:00
SystemZTargetMachine.h Delete Reloc::Default. 2016-05-18 22:04:49 +00:00
SystemZTargetTransformInfo.cpp [SystemZ] Implementation of getUnrollingPreferences(). 2016-09-28 09:41:38 +00:00
SystemZTargetTransformInfo.h Do a sweep over move ctors and remove those that are identical to the default. 2016-10-20 12:20:28 +00:00

README.txt

//===---------------------------------------------------------------------===//
// Random notes about and ideas for the SystemZ backend.
//===---------------------------------------------------------------------===//

The initial backend is deliberately restricted to z10.  We should add support
for later architectures at some point.

--

If an inline asm ties an i32 "r" result to an i64 input, the input
will be treated as an i32, leaving the upper bits uninitialised.
For example:

define void @f4(i32 *%dst) {
  %val = call i32 asm "blah $0", "=r,0" (i64 103)
  store i32 %val, i32 *%dst
  ret void
}

from CodeGen/SystemZ/asm-09.ll will use LHI rather than LGHI.
to load 103.  This seems to be a general target-independent problem.

--

The tuning of the choice between LOAD ADDRESS (LA) and addition in
SystemZISelDAGToDAG.cpp is suspect.  It should be tweaked based on
performance measurements.

--

There is no scheduling support.

--

We don't use the BRANCH ON INDEX instructions.

--

We only use MVC, XC and CLC for constant-length block operations.
We could extend them to variable-length operations too,
using EXECUTE RELATIVE LONG.

MVCIN, MVCLE and CLCLE may be worthwhile too.

--

We don't use CUSE or the TRANSLATE family of instructions for string
operations.  The TRANSLATE ones are probably more difficult to exploit.

--

We don't take full advantage of builtins like fabsl because the calling
conventions require f128s to be returned by invisible reference.

--

ADD LOGICAL WITH SIGNED IMMEDIATE could be useful when we need to
produce a carry.  SUBTRACT LOGICAL IMMEDIATE could be useful when we
need to produce a borrow.  (Note that there are no memory forms of
ADD LOGICAL WITH CARRY and SUBTRACT LOGICAL WITH BORROW, so the high
part of 128-bit memory operations would probably need to be done
via a register.)

--

We don't use ICM or STCM.

--

DAGCombiner doesn't yet fold truncations of extended loads.  Functions like:

    unsigned long f (unsigned long x, unsigned short *y)
    {
      return (x << 32) | *y;
    }

therefore end up as:

        sllg    %r2, %r2, 32
        llgh    %r0, 0(%r3)
        lr      %r2, %r0
        br      %r14

but truncating the load would give:

        sllg    %r2, %r2, 32
        lh      %r2, 0(%r3)
        br      %r14

--

Functions like:

define i64 @f1(i64 %a) {
  %and = and i64 %a, 1
  ret i64 %and
}

ought to be implemented as:

        lhi     %r0, 1
        ngr     %r2, %r0
        br      %r14

but two-address optimizations reverse the order of the AND and force:

        lhi     %r0, 1
        ngr     %r0, %r2
        lgr     %r2, %r0
        br      %r14

CodeGen/SystemZ/and-04.ll has several examples of this.

--

Out-of-range displacements are usually handled by loading the full
address into a register.  In many cases it would be better to create
an anchor point instead.  E.g. for:

define void @f4a(i128 *%aptr, i64 %base) {
  %addr = add i64 %base, 524288
  %bptr = inttoptr i64 %addr to i128 *
  %a = load volatile i128 *%aptr
  %b = load i128 *%bptr
  %add = add i128 %a, %b
  store i128 %add, i128 *%aptr
  ret void
}

(from CodeGen/SystemZ/int-add-08.ll) we load %base+524288 and %base+524296
into separate registers, rather than using %base+524288 as a base for both.

--

Dynamic stack allocations round the size to 8 bytes and then allocate
that rounded amount.  It would be simpler to subtract the unrounded
size from the copy of the stack pointer and then align the result.
See CodeGen/SystemZ/alloca-01.ll for an example.

--

If needed, we can support 16-byte atomics using LPQ, STPQ and CSDG.

--

We might want to model all access registers and use them to spill
32-bit values.

--

We might want to use the 'overflow' condition of eg. AR to support
llvm.sadd.with.overflow.i32 and related instructions - the generated code
for signed overflow check is currently quite bad.  This would improve
the results of using -ftrapv.